[PATCH] D11649: [regalloc] Make RegMask clobbers prevent merging vreg's into PhysRegs when hoisting def's upwards.

[Daniel Sanders]

dsanders created this revision.
dsanders added subscribers: llvm-commits, hans, qcolombet.
Herald added a subscriber: MatzeB.

This prevents vreg260 and D7 from being merged in:
  %vreg260<def> = LDC1 ...
  JAL <ga:@sin>, <regmask ... list not containing D7 ...>
  %D7<def> = COPY %vreg260; ...

This fixes the almabench regression in the LLVM 3.7.0 release branch.

http://reviews.llvm.org/D11649

Files:
  lib/CodeGen/RegisterCoalescer.cpp

Index: lib/CodeGen/RegisterCoalescer.cpp
===================================================================
--- lib/CodeGen/RegisterCoalescer.cpp
+++ lib/CodeGen/RegisterCoalescer.cpp
@@ -1531,6 +1531,14 @@
         DEBUG(dbgs() << "\t\tInterference (read): " << *MI);
         return false;
       }
+
+      // We must also check for clobbers caused by regmasks. We can't use
+      // definesRegister() since it doesn't account for regmasks.
+      for (const auto &MO : MI->operands()) {
+        if (MO.isRegMask() && MO.clobbersPhysReg(DstReg))
+          DEBUG(dbgs() << "\t\tInterference (regmask clobber): " << *MI);
+          return false;
+      }
     }
 
     // We're going to remove the copy which defines a physical reserved


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