[llvm] r243596 - push fast-math check for machine-combiner reassociations into instruction-type check; NFC

Sanjay Patel spatel at rotateright.com
Wed Jul 29 17:04:21 PDT 2015


Author: spatel
Date: Wed Jul 29 19:04:21 2015
New Revision: 243596

URL: http://llvm.org/viewvc/llvm-project?rev=243596&view=rev
Log:
push fast-math check for machine-combiner reassociations into instruction-type check; NFC

This makes it simpler to add instruction types that don't depend on fast-math.

Modified:
    llvm/trunk/lib/Target/X86/X86InstrInfo.cpp

Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=243596&r1=243595&r2=243596&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Wed Jul 29 19:04:21 2015
@@ -6348,8 +6348,8 @@ static bool hasReassocSibling(const Mach
 // TODO: There are many more machine instruction opcodes to match:
 //       1. Other data types (integer, vectors)
 //       2. Other math / logic operations (and, or)
-static bool isAssociativeAndCommutative(unsigned Opcode) {
-  switch (Opcode) {
+static bool isAssociativeAndCommutative(const MachineInstr &Inst) {
+  switch (Inst.getOpcode()) {
   case X86::ADDSDrr:
   case X86::ADDSSrr:
   case X86::VADDSDrr:
@@ -6358,7 +6358,7 @@ static bool isAssociativeAndCommutative(
   case X86::MULSSrr:
   case X86::VMULSDrr:
   case X86::VMULSSrr:
-    return true;
+    return Inst.getParent()->getParent()->getTarget().Options.UnsafeFPMath;
   default:
     return false;
   }
@@ -6374,7 +6374,7 @@ static bool isReassocCandidate(const Mac
   // 2. The instruction must have virtual register definitions for its
   //    operands in the same basic block.
   // 3. The instruction must have a reassociable sibling.
-  if (isAssociativeAndCommutative(Inst.getOpcode()) &&
+  if (isAssociativeAndCommutative(Inst) &&
       hasVirtualRegDefsInBasicBlock(Inst, Inst.getParent()) &&
       hasReassocSibling(Inst, Commuted))
     return true;
@@ -6391,9 +6391,6 @@ static bool isReassocCandidate(const Mac
 //    that pattern.
 bool X86InstrInfo::getMachineCombinerPatterns(MachineInstr &Root,
         SmallVectorImpl<MachineCombinerPattern::MC_PATTERN> &Patterns) const {
-  if (!Root.getParent()->getParent()->getTarget().Options.UnsafeFPMath)
-    return false;
-
   // TODO: There is nothing x86-specific here except the instruction type.
   // This logic could be hoisted into the machine combiner pass itself.
 





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