[PATCH] TableGen: Put NoRegAltName up front in RegAltNameIndices
David Siegel
david.siegel at artcom.de
Fri Jul 24 10:55:44 PDT 2015
Ping.
> On 15.07.2015, at 20:19, David Siegel <david.siegel at artcom.de> wrote:
>
> Ping.
>
> Adding @stoklund.
>
>> On 24.06.2015, at 19:38, David Siegel <david.siegel at artcom.de> wrote:
>>
>> Ping.
>>
>>> On 16.06.2015, at 12:17, David Siegel <david.siegel at artcom.de> wrote:
>>>
>>> Hi,
>>>
>>> AsmWriterEmitter::EmitGetRegisterName(...) assumes that the special item NoRegAltName is the first item in RegAltNameIndices (see AsmWriterEmitter.cpp:613). If it happens to be second element the namespace is empty and the generated code does not compile. I fixed this by moving the NoRegAltName item up front in CodeGenTarget::ReadRegAltNameIndices().
>>
>> To reproduce add this line to any RegisterInfo.td, adjust the namespace and recompile:
>>
>> let Namespace = “X86" in { def ABC : RegAltNameIndex; }
>>
>> This line succeeds:
>>
>> let Namespace = “X86" in { def XYZ : RegAltNameIndex; }
>>
>> I verified that the patch is still good. This is my first contribution. Let me know if something is missing.
>>
>> Cheers,
>>
>> d
>>
>
> <0001-TableGen-Fix-order-in-RegAltNameIndices.patch>
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