[llvm] r243124 - MIR Tests: Add liveins and successors to make tests pass with machine verifier.
Alex Lorenz
arphaman at gmail.com
Fri Jul 24 10:36:55 PDT 2015
Author: arphaman
Date: Fri Jul 24 12:36:55 2015
New Revision: 243124
URL: http://llvm.org/viewvc/llvm-project?rev=243124&view=rev
Log:
MIR Tests: Add liveins and successors to make tests pass with machine verifier.
This commit adds the liveins and successors properties to machine basic blocks
in some of the MIR tests to ensure that the tests will pass when the MIR parser
will run the machine verifier after initializing a machine function.
Modified:
llvm/trunk/test/CodeGen/MIR/X86/cfi-offset.mir
llvm/trunk/test/CodeGen/MIR/X86/external-symbol-operands.mir
llvm/trunk/test/CodeGen/MIR/X86/implicit-register-flag.mir
llvm/trunk/test/CodeGen/MIR/X86/instructions-debug-location.mir
llvm/trunk/test/CodeGen/MIR/X86/killed-register-flag.mir
llvm/trunk/test/CodeGen/MIR/X86/machine-basic-block-operands.mir
llvm/trunk/test/CodeGen/MIR/X86/metadata-operands.mir
llvm/trunk/test/CodeGen/MIR/X86/missing-implicit-operand.mir
llvm/trunk/test/CodeGen/MIR/X86/subregister-operands.mir
llvm/trunk/test/CodeGen/MIR/X86/virtual-registers.mir
Modified: llvm/trunk/test/CodeGen/MIR/X86/cfi-offset.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/cfi-offset.mir?rev=243124&r1=243123&r2=243124&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/cfi-offset.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/cfi-offset.mir Fri Jul 24 12:36:55 2015
@@ -29,6 +29,7 @@ fixedStack:
body:
- id: 0
name: entry
+ liveins: [ '%ecx', '%edi', '%edx', '%esi', '%rbx' ]
instructions:
- 'PUSH64r killed %rbx, implicit-def %rsp, implicit %rsp'
- 'CFI_INSTRUCTION .cfi_def_cfa_offset 16'
Modified: llvm/trunk/test/CodeGen/MIR/X86/external-symbol-operands.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/external-symbol-operands.mir?rev=243124&r1=243123&r2=243124&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/external-symbol-operands.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/external-symbol-operands.mir Fri Jul 24 12:36:55 2015
@@ -33,6 +33,7 @@ body:
- id: 0
name: entry
successors: [ '%bb.1.entry', '%bb.2.entry' ]
+ liveins: [ '%edi' ]
instructions:
- '%rsp = SUB64ri32 %rsp, 520, implicit-def %eflags'
- '%rcx = LOAD_STACK_GUARD'
@@ -43,6 +44,7 @@ body:
- 'JNE_1 %bb.2.entry, implicit %eflags'
- id: 1
name: entry
+ liveins: [ '%eax' ]
instructions:
- '%rsp = ADD64ri32 %rsp, 520, implicit-def %eflags'
- 'RETQ %eax'
Modified: llvm/trunk/test/CodeGen/MIR/X86/implicit-register-flag.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/implicit-register-flag.mir?rev=243124&r1=243123&r2=243124&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/implicit-register-flag.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/implicit-register-flag.mir Fri Jul 24 12:36:55 2015
@@ -22,6 +22,7 @@ name: foo
body:
- id: 0
name: entry
+ successors: [ '%bb.1.less', '%bb.2.exit' ]
instructions:
# CHECK: - 'CMP32ri8 %edi, 10, implicit-def %eflags'
# CHECK-NEXT: - 'JG_1 %bb.2.exit, implicit %eflags'
Modified: llvm/trunk/test/CodeGen/MIR/X86/instructions-debug-location.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/instructions-debug-location.mir?rev=243124&r1=243123&r2=243124&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/instructions-debug-location.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/instructions-debug-location.mir Fri Jul 24 12:36:55 2015
@@ -53,6 +53,7 @@ stack:
body:
- id: 0
name: entry
+ liveins: [ '%edi' ]
instructions:
# CHECK: DBG_VALUE _, 0, !12, !13, debug-location !14
# CHECK: %eax = COPY %0, debug-location !15
Modified: llvm/trunk/test/CodeGen/MIR/X86/killed-register-flag.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/killed-register-flag.mir?rev=243124&r1=243123&r2=243124&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/killed-register-flag.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/killed-register-flag.mir Fri Jul 24 12:36:55 2015
@@ -22,6 +22,7 @@ name: foo
body:
- id: 0
name: entry
+ successors: [ '%bb.1.less', '%bb.2.exit' ]
instructions:
- 'CMP32ri8 %edi, 10, implicit-def %eflags'
- 'JG_1 %bb.2.exit, implicit %eflags'
Modified: llvm/trunk/test/CodeGen/MIR/X86/machine-basic-block-operands.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/machine-basic-block-operands.mir?rev=243124&r1=243123&r2=243124&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/machine-basic-block-operands.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/machine-basic-block-operands.mir Fri Jul 24 12:36:55 2015
@@ -37,6 +37,7 @@ body:
# CHECK: name: entry
- id: 0
name: entry
+ successors: [ '%bb.1.less', '%bb.2.exit' ]
instructions:
- '%eax = MOV32rm %rdi, 1, _, 0, _'
# CHECK: - 'CMP32ri8 %eax, 10
@@ -60,6 +61,7 @@ body:
# CHECK: name: entry
- id: 0
name: entry
+ successors: [ '%bb.1', '%bb.3' ]
instructions:
- '%eax = MOV32rm %rdi, 1, _, 0, _'
# CHECK: - 'CMP32ri8 %eax, 10
Modified: llvm/trunk/test/CodeGen/MIR/X86/metadata-operands.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/metadata-operands.mir?rev=243124&r1=243123&r2=243124&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/metadata-operands.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/metadata-operands.mir Fri Jul 24 12:36:55 2015
@@ -53,6 +53,7 @@ stack:
body:
- id: 0
name: entry
+ liveins: [ '%edi' ]
instructions:
# CHECK: %0 = COPY %edi
# CHECK-NEXT: DBG_VALUE _, 0, !12, !13
Modified: llvm/trunk/test/CodeGen/MIR/X86/missing-implicit-operand.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/missing-implicit-operand.mir?rev=243124&r1=243123&r2=243124&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/missing-implicit-operand.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/missing-implicit-operand.mir Fri Jul 24 12:36:55 2015
@@ -24,6 +24,7 @@ name: foo
body:
- id: 0
name: entry
+ successors: [ '%bb.1.less', '%bb.2.exit' ]
instructions:
- '%eax = MOV32rm %rdi, 1, _, 0, _'
- 'CMP32ri8 %eax, 10, implicit-def %eflags'
Modified: llvm/trunk/test/CodeGen/MIR/X86/subregister-operands.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/subregister-operands.mir?rev=243124&r1=243123&r2=243124&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/subregister-operands.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/subregister-operands.mir Fri Jul 24 12:36:55 2015
@@ -21,6 +21,7 @@ registers:
body:
- name: entry
id: 0
+ liveins: [ '%edi' ]
instructions:
# CHECK: %0 = COPY %edi
# CHECK-NEXT: %1 = COPY %0:sub_8bit
Modified: llvm/trunk/test/CodeGen/MIR/X86/virtual-registers.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/virtual-registers.mir?rev=243124&r1=243123&r2=243124&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/virtual-registers.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/virtual-registers.mir Fri Jul 24 12:36:55 2015
@@ -44,6 +44,8 @@ registers:
body:
- id: 0
name: entry
+ successors: [ '%bb.2.exit', '%bb.1.less' ]
+ liveins: [ '%edi' ]
# CHECK: %0 = COPY %edi
# CHECK-NEXT: %1 = SUB32ri8 %0, 10
instructions:
@@ -81,6 +83,8 @@ registers:
body:
- id: 0
name: entry
+ successors: [ '%bb.2.exit', '%bb.1.less' ]
+ liveins: [ '%edi' ]
# CHECK: %0 = COPY %edi
# CHECK-NEXT: %1 = SUB32ri8 %0, 10
instructions:
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