[llvm] r243001 - [X86] Fix order of operands for ins and outs instructions when parsing intel syntax

[Hans Wennborg]

Merged in r243027.

Thanks,
Hans

On Thu, Jul 23, 2015 at 10:48 AM, Nadav Rotem <nrotem at apple.com> wrote:
> Yes, this is okay.
>
>> On Jul 23, 2015, at 9:21 AM, Hans Wennborg <hans at chromium.org> wrote:
>>
>> Nadav: Is this OK for merging to 3.7?
>>
>> On Thu, Jul 23, 2015 at 3:23 AM, Michael Kuperstein
>> <michael.m.kuperstein at intel.com> wrote:
>>> Author: mkuper
>>> Date: Thu Jul 23 05:23:48 2015
>>> New Revision: 243001
>>>
>>> URL: http://llvm.org/viewvc/llvm-project?rev=243001&view=rev
>>> Log:
>>> [X86] Fix order of operands for ins and outs instructions when parsing intel syntax
>>>
>>> Patch by: marina.yatsina at intel.com
>>> Differential Revision: http://reviews.llvm.org/D11337
>>>
>>> Modified:
>>>    llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp
>>>    llvm/trunk/test/MC/X86/intel-syntax.s
>>>
>>> Modified: llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp?rev=243001&r1=243000&r2=243001&view=diff
>>> ==============================================================================
>>> --- llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp (original)
>>> +++ llvm/trunk/lib/Target/X86/AsmParser/X86AsmParser.cpp Thu Jul 23 05:23:48 2015
>>> @@ -681,6 +681,9 @@ private:
>>>
>>>   std::unique_ptr<X86Operand> DefaultMemSIOperand(SMLoc Loc);
>>>   std::unique_ptr<X86Operand> DefaultMemDIOperand(SMLoc Loc);
>>> +  void AddDefaultSrcDestOperands(
>>> +      OperandVector& Operands, std::unique_ptr<llvm::MCParsedAsmOperand> &&Src,
>>> +      std::unique_ptr<llvm::MCParsedAsmOperand> &&Dst);
>>>   std::unique_ptr<X86Operand> ParseOperand();
>>>   std::unique_ptr<X86Operand> ParseATTOperand();
>>>   std::unique_ptr<X86Operand> ParseIntelOperand();
>>> @@ -1014,6 +1017,19 @@ std::unique_ptr<X86Operand> X86AsmParser
>>>                                Loc, Loc, 0);
>>> }
>>>
>>> +void X86AsmParser::AddDefaultSrcDestOperands(
>>> +    OperandVector& Operands, std::unique_ptr<llvm::MCParsedAsmOperand> &&Src,
>>> +    std::unique_ptr<llvm::MCParsedAsmOperand> &&Dst) {
>>> +  if (isParsingIntelSyntax()) {
>>> +    Operands.push_back(std::move(Dst));
>>> +    Operands.push_back(std::move(Src));
>>> +  }
>>> +  else {
>>> +    Operands.push_back(std::move(Src));
>>> +    Operands.push_back(std::move(Dst));
>>> +  }
>>> +}
>>> +
>>> std::unique_ptr<X86Operand> X86AsmParser::ParseOperand() {
>>>   if (isParsingIntelSyntax())
>>>     return ParseIntelOperand();
>>> @@ -2229,26 +2245,18 @@ bool X86AsmParser::ParseInstruction(Pars
>>>   if (Name.startswith("ins") && Operands.size() == 1 &&
>>>       (Name == "insb" || Name == "insw" || Name == "insl" ||
>>>        Name == "insd" )) {
>>> -    if (isParsingIntelSyntax()) {
>>> -      Operands.push_back(X86Operand::CreateReg(X86::DX, NameLoc, NameLoc));
>>> -      Operands.push_back(DefaultMemDIOperand(NameLoc));
>>> -    } else {
>>> -      Operands.push_back(X86Operand::CreateReg(X86::DX, NameLoc, NameLoc));
>>> -      Operands.push_back(DefaultMemDIOperand(NameLoc));
>>> -    }
>>> +    AddDefaultSrcDestOperands(Operands,
>>> +                              X86Operand::CreateReg(X86::DX, NameLoc, NameLoc),
>>> +                              DefaultMemDIOperand(NameLoc));
>>>   }
>>>
>>>   // Append default arguments to "outs[bwld]"
>>>   if (Name.startswith("outs") && Operands.size() == 1 &&
>>>       (Name == "outsb" || Name == "outsw" || Name == "outsl" ||
>>>        Name == "outsd" )) {
>>> -    if (isParsingIntelSyntax()) {
>>> -      Operands.push_back(DefaultMemSIOperand(NameLoc));
>>> -      Operands.push_back(X86Operand::CreateReg(X86::DX, NameLoc, NameLoc));
>>> -    } else {
>>> -      Operands.push_back(DefaultMemSIOperand(NameLoc));
>>> -      Operands.push_back(X86Operand::CreateReg(X86::DX, NameLoc, NameLoc));
>>> -    }
>>> +    AddDefaultSrcDestOperands(Operands,
>>> +                              DefaultMemSIOperand(NameLoc),
>>> +                              X86Operand::CreateReg(X86::DX, NameLoc, NameLoc));
>>>   }
>>>
>>>   // Transform "lods[bwlq]" into "lods[bwlq] ($SIREG)" for appropriate
>>> @@ -2280,13 +2288,9 @@ bool X86AsmParser::ParseInstruction(Pars
>>>       (Name == "cmps" || Name == "cmpsb" || Name == "cmpsw" ||
>>>        Name == "cmpsl" || Name == "cmpsd" || Name == "cmpsq")) {
>>>     if (Operands.size() == 1) {
>>> -      if (isParsingIntelSyntax()) {
>>> -        Operands.push_back(DefaultMemSIOperand(NameLoc));
>>> -        Operands.push_back(DefaultMemDIOperand(NameLoc));
>>> -      } else {
>>> -        Operands.push_back(DefaultMemDIOperand(NameLoc));
>>> -        Operands.push_back(DefaultMemSIOperand(NameLoc));
>>> -      }
>>> +      AddDefaultSrcDestOperands(Operands,
>>> +                                DefaultMemDIOperand(NameLoc),
>>> +                                DefaultMemSIOperand(NameLoc));
>>>     } else if (Operands.size() == 3) {
>>>       X86Operand &Op = (X86Operand &)*Operands[1];
>>>       X86Operand &Op2 = (X86Operand &)*Operands[2];
>>> @@ -2306,13 +2310,9 @@ bool X86AsmParser::ParseInstruction(Pars
>>>     if (Operands.size() == 1) {
>>>       if (Name == "movsd")
>>>         Operands.back() = X86Operand::CreateToken("movsl", NameLoc);
>>> -      if (isParsingIntelSyntax()) {
>>> -        Operands.push_back(DefaultMemDIOperand(NameLoc));
>>> -        Operands.push_back(DefaultMemSIOperand(NameLoc));
>>> -      } else {
>>> -        Operands.push_back(DefaultMemSIOperand(NameLoc));
>>> -        Operands.push_back(DefaultMemDIOperand(NameLoc));
>>> -      }
>>> +      AddDefaultSrcDestOperands(Operands,
>>> +                                DefaultMemSIOperand(NameLoc),
>>> +                                DefaultMemDIOperand(NameLoc));
>>>     } else if (Operands.size() == 3) {
>>>       X86Operand &Op = (X86Operand &)*Operands[1];
>>>       X86Operand &Op2 = (X86Operand &)*Operands[2];
>>>
>>> Modified: llvm/trunk/test/MC/X86/intel-syntax.s
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/X86/intel-syntax.s?rev=243001&r1=243000&r2=243001&view=diff
>>> ==============================================================================
>>> --- llvm/trunk/test/MC/X86/intel-syntax.s (original)
>>> +++ llvm/trunk/test/MC/X86/intel-syntax.s Thu Jul 23 05:23:48 2015
>>> @@ -667,3 +667,17 @@ frstor dword ptr [eax]
>>>
>>> // CHECK: cmpnless %xmm1, %xmm0
>>> cmpnless xmm0, xmm1
>>> +
>>> +insb
>>> +insw
>>> +insd
>>> +// CHECK: insb %dx, %es:(%rdi)
>>> +// CHECK: insw %dx, %es:(%rdi)
>>> +// CHECK: insl %dx, %es:(%rdi)
>>> +
>>> +outsb
>>> +outsw
>>> +outsd
>>> +// CHECK: outsb (%rsi), %dx
>>> +// CHECK: outsw (%rsi), %dx
>>> +// CHECK: outsl (%rsi), %dx
>>>
>>>
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>