[PATCH] D11408: [ARM/AArch64] - Remove some undefined behaviour when lowering vector shifts

[Luke Cheeseman]

LukeCheeseman added a comment.

Hi Renato

Thanks for pointing out the unnecessary check prefixes. I haven't added a testcase for the AArch64 backend as it isn't possible to hit the same undefined behaviour as in the ARM backend. The negation is only done in isVShiftRImm when isIntrinsic is true and the only call site in the AArch64 backend passes this as false so the negation isn't performed.

Thanks,
Luke


http://reviews.llvm.org/D11408