[PATCH] D11424: [AArch64] Match float round and convert to int instructions.

[Chad Rosier]

mcrosier added inline comments.

================
Comment at: lib/Target/AArch64/AArch64ISelDAGToDAG.cpp:2119
@@ +2118,3 @@
+  unsigned FpConVariant;
+  if (N->getOpcode() == ISD::FP_TO_SINT)
+    FpConVariant = 0;
----------------
Perhaps, put an assertion at the top of the function:

assert((N->getOpcode() == ISD::FP_TO_SINT || N->getOpcode() == ISD::FP_TO_UINT) && "Unexpected opcode!");

Then this logic could be simplified to something like:
unsigned FpConVariant = N->getOpcode() == ISD::FP_TO_SINT ? 0 : 1;

================
Comment at: lib/Target/AArch64/AArch64ISelDAGToDAG.cpp:2124
@@ +2123,3 @@
+  else {
+    assert("N must be a FP_TO_SINT/FP_TO_UINT operation");
+    return nullptr;
----------------
I don't think this will ever assert; the const string will always evaluate to true.

================
Comment at: lib/Target/AArch64/AArch64ISelDAGToDAG.cpp:2131
@@ +2130,3 @@
+  default:
+    assert("FP to INT rounding operation must be FLOOR/FCEIL/FROUND");
+    return nullptr;
----------------
Missing FTRUNC.

================
Comment at: lib/Target/AArch64/AArch64ISelDAGToDAG.cpp:3337
@@ +3336,3 @@
+  case ISD::FP_TO_UINT: {
+    unsigned Op0Opc = Node->getOperand(0).getNode()->getOpcode();
+    if (Op0Opc == ISD::FCEIL || Op0Opc == ISD::FFLOOR ||
----------------
Maybe a static helper function or fold the logic into the callee?


http://reviews.llvm.org/D11424