[PATCH] D11218: AVX512 : Integer Truncate with/without saturation support
Elena Demikhovsky
elena.demikhovsky at intel.com
Tue Jul 21 02:13:53 PDT 2015
delena added inline comments.
================
Comment at: lib/Target/X86/X86ISelLowering.cpp:15267
@@ +15266,3 @@
+ case X86ISD::VTRUNCUS:
+ // use X86ISD::SELEC to prevent lowering and combining
+ OpcodeSelect = X86ISD::SELECT;
----------------
X86ISD::SELECT
We can't use ISD::VSELECT here because it is not allays "Legal" for the destination type.
================
Comment at: lib/Target/X86/X86ISelLowering.cpp:16096
@@ -16053,1 +16095,3 @@
+static SDValue LowerINTRINSIC_TRUNCATE_TO_MEM(const SDValue & Op,
+ SelectionDAG &DAG,
----------------
1-2 lines of comments before function, please.
================
Comment at: lib/Target/X86/X86ISelLowering.cpp:16266
@@ -16186,1 +16265,3 @@
}
+ case TRUNCATE_TO_MEM_VI8: {
+ return LowerINTRINSIC_TRUNCATE_TO_MEM(Op, DAG, MVT::i8);
----------------
remove {}
================
Comment at: lib/Target/X86/X86ISelLowering.cpp:24124
@@ +24123,3 @@
+
+ // vpmovqb, vpmovqw, vpmovqd, vpmovdb, vpmovdw
+ if (TLI.isTruncStoreLegal(VT, StVT)) {
----------------
The comments here are also should be fixed as bellow.
================
Comment at: lib/Target/X86/X86ISelLowering.cpp:24125
@@ +24124,3 @@
+ // vpmovqb, vpmovqw, vpmovqd, vpmovdb, vpmovdw
+ if (TLI.isTruncStoreLegal(VT, StVT)) {
+ return SDValue();
----------------
remove {}
================
Comment at: lib/Target/X86/X86ISelLowering.cpp:24240
@@ -24143,1 +24239,3 @@
+ // vpmovqb, vpmovqw, vpmovqd, vpmovdb, vpmovdw
+ if (TLI.isTruncStoreLegal(VT, StVT)) {
----------------
Comments:
// The truncating store is legal in some cases. For example, the following SKX instructions are designated for truncate store.
// In this case we don't need any further transformations.
================
Comment at: lib/Target/X86/X86ISelLowering.cpp:24241
@@ +24240,3 @@
+ // vpmovqb, vpmovqw, vpmovqd, vpmovdb, vpmovdw
+ if (TLI.isTruncStoreLegal(VT, StVT)) {
+ return SDValue();
----------------
remove {}
Repository:
rL LLVM
http://reviews.llvm.org/D11218
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