[PATCH] D11382: x86 atomic: optimize a.store(reg op a.load(acquire), release)

[JF Bastien]

jfb created this revision.
jfb added reviewers: reames, kcc, dvyukov, nadav.
jfb added a subscriber: llvm-commits.

PR24191 finds that the expected memory-register operations aren't generated when relaxed { load ; modify ; store } is used. This is similar to PR17281 which was addressed in D4796, but only for memory-immediate operations (and for memory orderings up to acquire and release).

http://reviews.llvm.org/D11382

Files:
  lib/Target/X86/X86InstrCompiler.td
  lib/Target/X86/X86MCInstLower.cpp
  test/CodeGen/X86/atomic_mi.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D11382.30230.patch
Type: text/x-patch
Size: 18038 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20150721/ea7627d4/attachment.bin>