[llvm] r242694 - [AArch64] Change EON pattern to match more often.

[Chad Rosier]

Author: mcrosier
Date: Mon Jul 20 13:42:27 2015
New Revision: 242694

URL: http://llvm.org/viewvc/llvm-project?rev=242694&view=rev
Log:
[AArch64] Change EON pattern to match more often.

Phabricator: http://reviews.llvm.org/D11359
Patch by Geoff Berry <gberry at codeaurora.org>

Added:
    llvm/trunk/test/CodeGen/AArch64/eon.ll
Modified:
    llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.td

Modified: llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.td?rev=242694&r1=242693&r2=242694&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.td (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64InstrInfo.td Mon Jul 20 13:42:27 2015
@@ -841,7 +841,7 @@ defm AND  : LogicalReg<0b00, 0, "and", a
 defm BIC  : LogicalReg<0b00, 1, "bic",
                        BinOpFrag<(and node:$LHS, (not node:$RHS))>>;
 defm EON  : LogicalReg<0b10, 1, "eon",
-                       BinOpFrag<(xor node:$LHS, (not node:$RHS))>>;
+                       BinOpFrag<(not (xor node:$LHS, node:$RHS))>>;
 defm EOR  : LogicalReg<0b10, 0, "eor", xor>;
 defm ORN  : LogicalReg<0b01, 1, "orn",
                        BinOpFrag<(or node:$LHS, (not node:$RHS))>>;

Added: llvm/trunk/test/CodeGen/AArch64/eon.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/eon.ll?rev=242694&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/eon.ll (added)
+++ llvm/trunk/test/CodeGen/AArch64/eon.ll Mon Jul 20 13:42:27 2015
@@ -0,0 +1,29 @@
+; RUN: llc -mtriple=aarch64-none-linux-gnu < %s | FileCheck %s
+
+; Check that the eon instruction is generated instead of eor,movn
+define i64 @test1(i64 %a, i64 %b, i64 %c) {
+; CHECK-LABEL: test1:
+; CHECK: eon
+; CHECK: ret
+entry:
+  %shl = shl i64 %b, 4
+  %neg = xor i64 %a, -1
+  %xor = xor i64 %shl, %neg
+  ret i64 %xor
+}
+
+; Same check with mutliple uses of %neg
+define i64 @test2(i64 %a, i64 %b, i64 %c) {
+; CHECK-LABEL: test2:
+; CHECK: eon
+; CHECK: eon
+; CHECK: lsl
+; CHECK: ret
+entry:
+  %shl = shl i64 %b, 4
+  %neg = xor i64 %shl, -1
+  %xor = xor i64 %neg, %a
+  %xor1 = xor i64 %c, %neg
+  %shl2 = shl i64 %xor, %xor1
+  ret i64 %shl2
+}