[PATCH] D10683: AVX-512 vector shuffle lowering

[Demikhovsky, Elena]

AVX-512 shuffles are more symmetric for FP and Int types, than divergent. 
So if I split them, I'll write the same code twice. I know this because I have the full shuffle implementation on my table.
You can look at it here, but on the left side, in red.
http://reviews.llvm.org/D10502

The only "if" you'll see at line 10274, left side.

All vperm/vpermil/valign/unpack are symmetric.

> Also, it'd be nice if you could add shuffle decode support for the AVX512 vperm* instructions so there are helpful assembly comments.
No problem, I will. Do you want to see this in the same patch?

-  Elena


-----Original Message-----
From: Simon Pilgrim [mailto:llvm-dev at redking.me.uk] 
Sent: Sunday, July 19, 2015 13:39
To: Demikhovsky, Elena; chandlerc at gmail.com; qcolombet at apple.com; Andrea_DiBiagio at sn.scee.net; Zaks, Ayal; llvm-dev at redking.me.uk
Cc: llvm-commits at cs.uiuc.edu
Subject: Re: [PATCH] D10683: AVX-512 vector shuffle lowering

RKSimon added a comment.

The lowerVectorShuffleWithPERMV looks alright, but why did you merge the lowerV8F64VectorShuffle/lowerV8I64VectorShuffle and lowerV16F32VectorShuffle/lowerV16I32VectorShuffle functions? Yes the permutevar instructions are available on all domains but when you come to adding support for the faster immediate shuffle instructions (vpshufd/vpshufps/vpermilps/vpermilpd etc.) the implementations will diverge quite quickly again.

Also, it'd be nice if you could add shuffle decode support for the AVX512 vperm* instructions so there are helpful assembly comments.


Repository:
  rL LLVM

http://reviews.llvm.org/D10683



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