[llvm] r242201 - WebAssembly: add basic int/fp instruction codegen.
JF Bastien
jfb at google.com
Wed Jul 15 09:24:32 PDT 2015
I'm missing the AsmPrinter to be able to do this IIUC (I'm not very
familiar with Target-side things, correct me if I'm wrong!). I'll do that
next, keeping the list of instructions small for now and working my way to
these llc tests.
On Tue, Jul 14, 2015 at 5:26 PM, Rafael Espíndola <
rafael.espindola at gmail.com> wrote:
> With this you should be able to add a llc test, no?
>
> On 14 July 2015 at 14:13, JF Bastien <jfb at google.com> wrote:
> > Author: jfb
> > Date: Tue Jul 14 16:13:29 2015
> > New Revision: 242201
> >
> > URL: http://llvm.org/viewvc/llvm-project?rev=242201&view=rev
> > Log:
> > WebAssembly: add basic int/fp instruction codegen.
> >
> > Summary: This patch has the most basic instruction codegen for 32 and 64
> bit int/fp.
> >
> > Reviewers: sunfish
> >
> > Subscribers: llvm-commits, jfb
> >
> > Differential Revision: http://reviews.llvm.org/D11193
> >
> > Modified:
> > llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrFloat.td
> > llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrFormats.td
> > llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrInteger.td
> >
> > Modified: llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrFloat.td
> > URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrFloat.td?rev=242201&r1=242200&r2=242201&view=diff
> >
> ==============================================================================
> > --- llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrFloat.td (original)
> > +++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrFloat.td Tue Jul
> 14 16:13:29 2015
> > @@ -12,26 +12,33 @@
> > ///
> >
> //===----------------------------------------------------------------------===//
> >
> > +defm FADD : BinaryFP<fadd>;
> > +defm FSUB : BinaryFP<fsub>;
> > +defm FMUL : BinaryFP<fmul>;
> > +defm FDIV : BinaryFP<fdiv>;
> > +defm FABS : UnaryFP<fabs>;
> > +defm FNEG : UnaryFP<fneg>;
> > +defm COPYSIGN : BinaryFP<fcopysign>;
> > +defm CEIL : UnaryFP<fceil>;
> > +defm FLOOR : UnaryFP<ffloor>;
> > +defm TRUNC : UnaryFP<ftrunc>;
> > +defm NEARESTINT : UnaryFP<fnearbyint>;
> > +
> > /*
> > * TODO(jfb): Add the following for 32-bit and 64-bit.
> > *
> > - * float32.add: addition
> > - * float32.sub: subtraction
> > - * float32.mul: multiplication
> > - * float32.div: division
> > - * float32.abs: absolute value
> > - * float32.neg: negation
> > - * float32.copysign: copysign
> > - * float32.ceil: ceiling operation
> > - * float32.floor: floor operation
> > - * float32.trunc: round to nearest integer towards zero
> > - * float32.nearestint: round to nearest integer, ties to even
> > * float32.eq: compare equal
> > * float32.lt: less than
> > * float32.le: less than or equal
> > * float32.gt: greater than
> > * float32.ge: greater than or equal
> > - * float32.sqrt: square root
> > + */
> > +
> > +defm SQRT : UnaryFP<fsqrt>;
> > +
> > +/*
> > + * TODO(jfb): Add the following for 32-bit and 64-bit.
> > + *
> > * float32.min: minimum (binary operator); if either operand is NaN,
> returns NaN
> > * float32.max: maximum (binary operator); if either operand is NaN,
> returns NaN
> > */
> >
> > Modified: llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrFormats.td
> > URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrFormats.td?rev=242201&r1=242200&r2=242201&view=diff
> >
> ==============================================================================
> > --- llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrFormats.td
> (original)
> > +++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrFormats.td Tue Jul
> 14 16:13:29 2015
> > @@ -27,3 +27,29 @@ class I<dag oops, dag iops, list<dag> pa
> > dag InOperandList = iops;
> > let Pattern = pattern;
> > }
> > +
> > +// Unary and binary instructions, for the local types that WebAssembly
> supports.
> > +multiclass UnaryInt<SDNode node> {
> > + def _I32 : I<(outs Int32:$dst), (ins Int32:$src),
> > + [(set Int32:$dst, (node Int32:$src))]>;
> > + def _I64 : I<(outs Int64:$dst), (ins Int64:$src),
> > + [(set Int64:$dst, (node Int64:$src))]>;
> > +}
> > +multiclass BinaryInt<SDNode node> {
> > + def _I32 : I<(outs Int32:$dst), (ins Int32:$lhs, Int32:$rhs),
> > + [(set Int32:$dst, (node Int32:$lhs, Int32:$rhs))]>;
> > + def _I64 : I<(outs Int64:$dst), (ins Int64:$lhs, Int64:$rhs),
> > + [(set Int64:$dst, (node Int64:$lhs, Int64:$rhs))]>;
> > +}
> > +multiclass UnaryFP<SDNode node> {
> > + def _F32 : I<(outs Float32:$dst), (ins Float32:$src),
> > + [(set Float32:$dst, (node Float32:$src))]>;
> > + def _F64 : I<(outs Float64:$dst), (ins Float64:$src),
> > + [(set Float64:$dst, (node Float64:$src))]>;
> > +}
> > +multiclass BinaryFP<SDNode node> {
> > + def _F32 : I<(outs Float32:$dst), (ins Float32:$lhs, Float32:$rhs),
> > + [(set Float32:$dst, (node Float32:$lhs, Float32:$rhs))]>;
> > + def _F64 : I<(outs Float64:$dst), (ins Float64:$lhs, Float64:$rhs),
> > + [(set Float64:$dst, (node Float64:$lhs, Float64:$rhs))]>;
> > +}
> >
> > Modified: llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrInteger.td
> > URL:
> http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrInteger.td?rev=242201&r1=242200&r2=242201&view=diff
> >
> ==============================================================================
> > --- llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrInteger.td
> (original)
> > +++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrInteger.td Tue Jul
> 14 16:13:29 2015
> > @@ -12,22 +12,23 @@
> > ///
> >
> //===----------------------------------------------------------------------===//
> >
> > +defm ADD : BinaryInt<add>;
> > +defm SUB : BinaryInt<sub>;
> > +defm MUL : BinaryInt<mul>;
> > +defm SDIV : BinaryInt<sdiv>;
> > +defm UDIV : BinaryInt<udiv>;
> > +defm SREM : BinaryInt<srem>;
> > +defm UREM : BinaryInt<urem>;
> > +defm AND : BinaryInt<and>;
> > +defm IOR : BinaryInt<or>;
> > +defm XOR : BinaryInt<xor>;
> > +defm SHL : BinaryInt<shl>;
> > +defm SHR : BinaryInt<srl>;
> > +defm SAR : BinaryInt<sra>;
> > +
> > /*
> > * TODO(jfb): Add the following for 32-bit and 64-bit.
> > *
> > - * int32.add: signed-less addition
> > - * int32.sub: signed-less subtraction
> > - * int32.mul: signed-less multiplication (lower 32-bits)
> > - * int32.sdiv: signed division
> > - * int32.udiv: unsigned division
> > - * int32.srem: signed remainder
> > - * int32.urem: unsigned remainder
> > - * int32.and: signed-less logical and
> > - * int32.ior: signed-less inclusive or
> > - * int32.xor: signed-less exclusive or
> > - * int32.shl: signed-less shift left
> > - * int32.shr: signed-less logical shift right
> > - * int32.sar: signed-less arithmetic shift right
> > * int32.eq: signed-less compare equal
> > * int32.slt: signed less than
> > * int32.sle: signed less than or equal
> > @@ -37,7 +38,8 @@
> > * int32.sge: signed greater than or equal
> > * int32.ugt: unsigned greater than
> > * int32.uge: unsigned greater than or equal
> > - * int32.clz: count leading zeroes (defined for all values, including
> zero)
> > - * int32.ctz: count trailing zeroes (defined for all values, including
> zero)
> > - * int32.popcnt: count number of ones
> > */
> > +
> > +defm CLZ : UnaryInt<ctlz>;
> > +defm CTZ : UnaryInt<cttz>;
> > +defm POPCNT : UnaryInt<ctpop>;
> >
> >
> > _______________________________________________
> > llvm-commits mailing list
> > llvm-commits at cs.uiuc.edu
> > http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
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