[PATCH] D7174: [AArch64] Fix problems in handling generic MSR/MRS instructions

[Phabricator]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL242274: [TableGen] Improve decoding options for non-orthogonal instructions (authored by petr.pavlu).

Changed prior to commit:
  http://reviews.llvm.org/D7174?vs=29088&id=29756#toc

Repository:
  rL LLVM

http://reviews.llvm.org/D7174

Files:
  llvm/trunk/include/llvm/MC/MCFixedLenDisassembler.h
  llvm/trunk/include/llvm/Target/Target.td
  llvm/trunk/test/TableGen/trydecode-emission.td
  llvm/trunk/test/TableGen/trydecode-emission2.td
  llvm/trunk/test/TableGen/trydecode-emission3.td
  llvm/trunk/utils/TableGen/DisassemblerEmitter.cpp
  llvm/trunk/utils/TableGen/FixedLenDecoderEmitter.cpp

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