[PATCH] D10867: [Codegen] Added intrinsics 'absdiff' and corresponding SDNodes for absolute difference operation

[James Molloy]

jmolloy added inline comments.

================
Comment at: lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp:721
@@ +720,3 @@
+  SDValue Tmp1, Tmp2, Tmp3, Tmp4;
+  EVT VT = Op.getValueType();
+  if (Op->getOpcode() == ISD::UABSDIFF) {
----------------
This is unnecessarily complex. You've duplicated most of the code, whereas the only things that need changing are:

    Flags.setNoSignedWrap(Op->getOpcode() == ISD::SABSDIFF);

and

    DAG.getCondCode(Op->getOpcode() == ISD::SABSDIFF ? ISD::SETLT : ISD::SETULT);


Repository:
  rL LLVM

http://reviews.llvm.org/D10867