[llvm] r242036 - [ARM] Handle commutativity when converting to tADDhirr in Thumb2

[Scott Douglass]

Author: scott-0
Date: Mon Jul 13 10:31:48 2015
New Revision: 242036

URL: http://llvm.org/viewvc/llvm-project?rev=242036&view=rev
Log:
[ARM] Handle commutativity when converting to tADDhirr in Thumb2

Also, run thumb_rewrite.s tests in Thumb2 now that they pass.

Differential Revision: http://reviews.llvm.org/D11132

Modified:
    llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
    llvm/trunk/test/MC/ARM/thumb2-narrow-dp.ll
    llvm/trunk/test/MC/ARM/thumb_rewrites.s

Modified: llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp?rev=242036&r1=242035&r2=242036&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp (original)
+++ llvm/trunk/lib/Target/ARM/AsmParser/ARMAsmParser.cpp Mon Jul 13 10:31:48 2015
@@ -8215,8 +8215,16 @@ bool ARMAsmParser::processInstruction(MC
     // If the destination and first source operand are the same, and
     // there's no setting of the flags, use encoding T2 instead of T3.
     // Note that this is only for ADD, not SUB. This mirrors the system
-    // 'as' behaviour. Make sure the wide encoding wasn't explicit.
-    if (Inst.getOperand(0).getReg() != Inst.getOperand(1).getReg() ||
+    // 'as' behaviour.  Also take advantage of ADD being commutative.
+    // Make sure the wide encoding wasn't explicit.
+    bool Swap = false;
+    auto DestReg = Inst.getOperand(0).getReg();
+    bool Transform = DestReg == Inst.getOperand(1).getReg();
+    if (!Transform && DestReg == Inst.getOperand(2).getReg()) {
+      Transform = true;
+      Swap = true;
+    }
+    if (!Transform ||
         Inst.getOperand(5).getReg() != 0 ||
         (static_cast<ARMOperand &>(*Operands[3]).isToken() &&
          static_cast<ARMOperand &>(*Operands[3]).getToken() == ".w"))
@@ -8225,7 +8233,7 @@ bool ARMAsmParser::processInstruction(MC
     TmpInst.setOpcode(ARM::tADDhirr);
     TmpInst.addOperand(Inst.getOperand(0));
     TmpInst.addOperand(Inst.getOperand(0));
-    TmpInst.addOperand(Inst.getOperand(2));
+    TmpInst.addOperand(Inst.getOperand(Swap ? 1 : 2));
     TmpInst.addOperand(Inst.getOperand(3));
     TmpInst.addOperand(Inst.getOperand(4));
     Inst = TmpInst;

Modified: llvm/trunk/test/MC/ARM/thumb2-narrow-dp.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/thumb2-narrow-dp.ll?rev=242036&r1=242035&r2=242036&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/thumb2-narrow-dp.ll (original)
+++ llvm/trunk/test/MC/ARM/thumb2-narrow-dp.ll Mon Jul 13 10:31:48 2015
@@ -44,6 +44,8 @@
 // CHECK: adds  r0, r2, r1          @ encoding: [0x50,0x18]
     ADDS     r2, r2, r1          // ADDS has T1 narrow 3 operand
 // CHECK: adds  r2, r2, r1          @ encoding: [0x52,0x18]
+    ADD      r3, r1, r3          // T2
+// CHECK: add  r3, r1               @ encoding: [0x0b,0x44]
 
     IT EQ
 // CHECK: it eq                     @ encoding: [0x08,0xbf]

Modified: llvm/trunk/test/MC/ARM/thumb_rewrites.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/ARM/thumb_rewrites.s?rev=242036&r1=242035&r2=242036&view=diff
==============================================================================
--- llvm/trunk/test/MC/ARM/thumb_rewrites.s (original)
+++ llvm/trunk/test/MC/ARM/thumb_rewrites.s Mon Jul 13 10:31:48 2015
@@ -1,4 +1,5 @@
 @ RUN: llvm-mc -triple thumbv6m -show-encoding < %s | FileCheck %s
+@ RUN: llvm-mc -triple thumbv7m -show-encoding < %s | FileCheck %s
 
     adds    r1, r1, #3
 @ CHECK: adds   r1, r1, #3          @ encoding: [0xc9,0x1c]