[llvm] r241873 - [x86] enable machine combiner reassociations for scalar double-precision multiplies
Sanjay Patel
spatel at rotateright.com
Thu Jul 9 15:58:39 PDT 2015
Author: spatel
Date: Thu Jul 9 17:58:39 2015
New Revision: 241873
URL: http://llvm.org/viewvc/llvm-project?rev=241873&view=rev
Log:
[x86] enable machine combiner reassociations for scalar double-precision multiplies
Modified:
llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
llvm/trunk/test/CodeGen/X86/machine-combiner.ll
Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.cpp?rev=241873&r1=241872&r2=241873&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.cpp Thu Jul 9 17:58:39 2015
@@ -6404,7 +6404,7 @@ static bool hasReassocSibling(const Mach
}
// TODO: There are many more machine instruction opcodes to match:
-// 1. Other data types (double, integer, vectors)
+// 1. Other data types (integer, vectors)
// 2. Other math / logic operations (and, or)
static bool isAssociativeAndCommutative(unsigned Opcode) {
switch (Opcode) {
@@ -6412,7 +6412,9 @@ static bool isAssociativeAndCommutative(
case X86::ADDSSrr:
case X86::VADDSDrr:
case X86::VADDSSrr:
+ case X86::MULSDrr:
case X86::MULSSrr:
+ case X86::VMULSDrr:
case X86::VMULSSrr:
return true;
default:
Modified: llvm/trunk/test/CodeGen/X86/machine-combiner.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/machine-combiner.ll?rev=241873&r1=241872&r2=241873&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/machine-combiner.ll (original)
+++ llvm/trunk/test/CodeGen/X86/machine-combiner.ll Thu Jul 9 17:58:39 2015
@@ -187,3 +187,26 @@ define double @reassociate_adds_double(d
%t2 = fadd double %x3, %t1
ret double %t2
}
+
+; Verify that SSE and AVX scalar double-precison multiplies are reassociated.
+
+define double @reassociate_muls_double(double %x0, double %x1, double %x2, double %x3) {
+; SSE-LABEL: reassociate_muls_double:
+; SSE: # BB#0:
+; SSE-NEXT: divsd %xmm1, %xmm0
+; SSE-NEXT: mulsd %xmm3, %xmm2
+; SSE-NEXT: mulsd %xmm2, %xmm0
+; SSE-NEXT: retq
+;
+; AVX-LABEL: reassociate_muls_double:
+; AVX: # BB#0:
+; AVX-NEXT: vdivsd %xmm1, %xmm0, %xmm0
+; AVX-NEXT: vmulsd %xmm3, %xmm2, %xmm1
+; AVX-NEXT: vmulsd %xmm1, %xmm0, %xmm0
+; AVX-NEXT: retq
+ %t0 = fdiv double %x0, %x1
+ %t1 = fmul double %x2, %t0
+ %t2 = fmul double %x3, %t1
+ ret double %t2
+}
+
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