[PATCH] D10804: [SDAG] Optimize unordered comparison in soft-float mode
Anton Nadolskiy
anton.nadolskiy at gmail.com
Thu Jul 9 10:24:57 PDT 2015
anadolskiy added a comment.
Thanks for comments, Ahmed
================
Comment at: test/CodeGen/AArch64/arm64-fp128.ll:167
@@ -171,3 +166,3 @@
; olt == !uge, which LLVM unfortunately "optimizes" this to.
%cond = fcmp olt fp128 %lhs, %rhs
----------------
Yes, exactly. But there's no XOR in given IR, so we must explain why GE. And I agree that <unfortunately "optimizes"> is now just "optimizes"
Repository:
rL LLVM
http://reviews.llvm.org/D10804
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