[PATCH] D10981: MIR Serialization: serialize the virtual register definitions.

[Alex Lorenz]

arphaman added reviewers: dexonsmith, bob.wilson, bogner.
arphaman added a subscriber: llvm-commits.

This patch serializes the definitions of the virtual registers.

The virtual registers are serialized using a YAML sequence of YAML inline mappings. Each mapping has the id of the virtual register and the register class. Example:

  registers:
     - { id: 0, class: gr32 }
     - { id: 1, class: gr32 }

The virtual register references will be serialized in the upcoming patch. They will use the ids specified in the definitions and will have the following syntax:
        
        %<id>

Repository:
  rL LLVM

http://reviews.llvm.org/D10981

Files:
  include/llvm/CodeGen/MIRYamlMapping.h
  lib/CodeGen/MIRParser/MIRParser.cpp
  lib/CodeGen/MIRPrinter.cpp
  test/CodeGen/MIR/X86/undefined-register-class.mir
  test/CodeGen/MIR/X86/virtual-registers.mir

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D10981.29144.patch
Type: text/x-patch
Size: 9576 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20150707/a2738eef/attachment.bin>