[PATCH] D10978: AMDGPU/SI: Fix read2 merging into a super register.

[Matt Arsenault]

arsenm added a subscriber: llvm-commits.

If the read2 produced was supposed to be writing into a
super register, it would use the wrong subregister indices.
Fix this by inserting copies, so we only ever write to a vreg_64.
Run the register coalescer again to clean this up, although this
isn't ideal and often does result in an extra move.
    
Also remove the assert that offset1 > offset0.
   
There isn't a real reason to not allow this other than a minor
convenience in the compiler, and it doesn't seem worth the effort
of avoiding it.


http://reviews.llvm.org/D10978

Files:
  lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
  lib/Target/AMDGPU/SIInstrInfo.cpp
  lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
  test/CodeGen/AMDGPU/ds_read2.ll
  test/CodeGen/AMDGPU/ds_read2_offset_order.ll
  test/CodeGen/AMDGPU/ds_read2_superreg.ll
  test/CodeGen/AMDGPU/ds_read2st64.ll
  test/CodeGen/AMDGPU/ds_write2.ll
  test/CodeGen/AMDGPU/ds_write2st64.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D10978.29139.patch
Type: text/x-patch
Size: 22890 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20150707/1435ca31/attachment.bin>