[PATCH] D10955: [mips][microMIPS] Add microMIPS32r6 and microMIPS64r6 tests for existing 16-bit ADDIUR1SP, ADDIUR2, ADDIUS5 and ADDIUSP instructions

[Zlatko Buljan]

zbuljan added reviewers: zoran.jovanovic, dsanders, hvarga.
zbuljan added subscribers: petarj, llvm-commits.

The patch adds microMIPS32r6 and microMIPS64r6 tests for existing 16-bit ADDIUR1SP, ADDIUR2, ADDIUS5 and ADDIUSP instructions.

http://reviews.llvm.org/D10955

Files:
  test/MC/Mips/micromips32r6/invalid.s
  test/MC/Mips/micromips32r6/valid.s
  test/MC/Mips/micromips64r6/invalid.s
  test/MC/Mips/micromips64r6/valid.s

Index: test/MC/Mips/micromips64r6/valid.s
===================================================================
--- test/MC/Mips/micromips64r6/valid.s
+++ test/MC/Mips/micromips64r6/valid.s
@@ -1,6 +1,15 @@
 # RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips64r6 -mattr=micromips | FileCheck %s
 a:
         .set noat
+        addiur1sp $7, 4          # CHECK: addiur1sp $7, 4     # encoding: [0x6f,0x83]
+        addiur2 $6, $7, -1       # CHECK: addiur2 $6, $7, -1  # encoding: [0x6f,0x7e]
+        addiur2 $6, $7, 12       # CHECK: addiur2 $6, $7, 12  # encoding: [0x6f,0x76]
+        addius5 $7, -2           # CHECK: addius5 $7, -2      # encoding: [0x4c,0xfc]
+        addiusp -1028            # CHECK: addiusp -1028       # encoding: [0x4f,0xff]
+        addiusp -1032            # CHECK: addiusp -1032       # encoding: [0x4f,0xfd]
+        addiusp 1024             # CHECK: addiusp 1024        # encoding: [0x4c,0x01]
+        addiusp 1028             # CHECK: addiusp 1028        # encoding: [0x4c,0x03]
+        addiusp -16              # CHECK: addiusp -16         # encoding: [0x4f,0xf9]
         daui $3, $4, 5           # CHECK: daui $3, $4, 5      # encoding: [0xf0,0x64,0x00,0x05]
 
 1:
Index: test/MC/Mips/micromips64r6/invalid.s
===================================================================
--- /dev/null
+++ test/MC/Mips/micromips64r6/invalid.s
@@ -0,0 +1,10 @@
+# RUN: not llvm-mc %s -triple=mips -show-encoding -mcpu=mips64r6 -mattr=micromips 2>%t1
+# RUN: FileCheck %s < %t1
+
+  addiur1sp $7, 260        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
+  addiur1sp $7, 241        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: misaligned immediate operand value
+  addiur1sp $8, 240        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
+  addiur2 $9, $7, -1       # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
+  addiur2 $6, $7, 10       # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
+  addius5 $7, 9            # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
+  addiusp 1032             # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
Index: test/MC/Mips/micromips32r6/valid.s
===================================================================
--- test/MC/Mips/micromips32r6/valid.s
+++ test/MC/Mips/micromips32r6/valid.s
@@ -5,6 +5,15 @@
   addiu $3, $4, 1234       # CHECK: addiu $3, $4, 1234  # encoding: [0x30,0x64,0x04,0xd2]
   addu $3, $4, $5          # CHECK: addu $3, $4, $5     # encoding: [0x00,0xa4,0x19,0x50]
   addiupc $4, 100          # CHECK: addiupc $4, 100     # encoding: [0x78,0x80,0x00,0x19]
+  addiur1sp $7, 4          # CHECK: addiur1sp $7, 4     # encoding: [0x6f,0x83]
+  addiur2 $6, $7, -1       # CHECK: addiur2 $6, $7, -1  # encoding: [0x6f,0x7e]
+  addiur2 $6, $7, 12       # CHECK: addiur2 $6, $7, 12  # encoding: [0x6f,0x76]
+  addius5 $7, -2           # CHECK: addius5 $7, -2      # encoding: [0x4c,0xfc]
+  addiusp -1028            # CHECK: addiusp -1028       # encoding: [0x4f,0xff]
+  addiusp -1032            # CHECK: addiusp -1032       # encoding: [0x4f,0xfd]
+  addiusp 1024             # CHECK: addiusp 1024        # encoding: [0x4c,0x01]
+  addiusp 1028             # CHECK: addiusp 1028        # encoding: [0x4c,0x03]
+  addiusp -16              # CHECK: addiusp -16         # encoding: [0x4f,0xf9]
   aluipc $3, 56            # CHECK: aluipc $3, 56       # encoding: [0x78,0x7f,0x00,0x38]
   and $3, $4, $5           # CHECK: and $3, $4, $5      # encoding: [0x00,0xa4,0x1a,0x50]
   andi $3, $4, 1234        # CHECK: andi $3, $4, 1234   # encoding: [0xd0,0x64,0x04,0xd2]
Index: test/MC/Mips/micromips32r6/invalid.s
===================================================================
--- test/MC/Mips/micromips32r6/invalid.s
+++ test/MC/Mips/micromips32r6/invalid.s
@@ -1,6 +1,13 @@
 # RUN: not llvm-mc %s -triple=mips -show-encoding -mcpu=mips32r6 -mattr=micromips 2>%t1
 # RUN: FileCheck %s < %t1
 
+  addiur1sp $7, 260        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
+  addiur1sp $7, 241        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: misaligned immediate operand value
+  addiur1sp $8, 240        # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
+  addiur2 $9, $7, -1       # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
+  addiur2 $6, $7, 10       # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
+  addius5 $7, 9            # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
+  addiusp 1032             # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
   break 1024               # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
   break 1023, 1024         # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
   ei $32                   # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction


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