[PATCH] D10539: [mips] Handling of immediates bigger than 16 bits

[Srdjan Obucina]

obucina marked 4 inline comments as done.

================
Comment at: lib/Target/Mips/AsmParser/MipsAsmParser.cpp:1650-1653
@@ +1649,6 @@
+  case Mips::XORi:
+    if ((Inst.getNumOperands() == 3) &&
+         Inst.getOperand(0).isReg() &&
+         Inst.getOperand(1).isReg() &&
+         Inst.getOperand(2).isImm()) {
+      int64_t ImmValue = Inst.getOperand(2).getImm();
----------------
dsanders wrote:
> I don't understand this check. All the above instructions have the form:
>   insn reg, reg, imm
> Can you show me a case where it's false?
Check test/MC/Mips/xgot.s, line 36.

================
Comment at: lib/Target/Mips/AsmParser/MipsAsmParser.cpp:2502
@@ +2501,3 @@
+
+  if (!loadImmediate(ImmValue, DstReg, Mips::NoRegister, true, Inst.getLoc(), Instructions)) {
+    switch (FinalOpcode) {
----------------
dsanders wrote:
> The 'true' seems suspicious. Am I right in assuming support for the 64-bit equivalents will be in a later patch?
Yes.


http://reviews.llvm.org/D10539