[PATCH] Add missing builtins to the PPC back end for ABI compliance (vol. 2)

[Eric Christopher]

One inline comment and then LGTM.

-eric


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  rL LLVM

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Comment at: test/CodeGen/PowerPC/vsx-elementary-arith.ll:121-136
@@ +120,18 @@
+; Function Attrs: nounwind
+define void @emit_xvrsqrte() #0 {
+entry:
+; CHECK-LABEL: @emit_xvrsqrte
+  %vf = alloca <4 x float>, align 16
+  %vfr = alloca <4 x float>, align 16
+  %vd = alloca <2 x double>, align 16
+  %vdr = alloca <2 x double>, align 16
+  %0 = load <4 x float>, <4 x float>* %vf, align 16
+  %1 = call <4 x float> @llvm.ppc.vsx.xvrsqrtesp(<4 x float> %0)
+; CHECK: xvrsqrtesp {{[0-9]+}}, {{[0-9]+}}
+  store <4 x float> %1, <4 x float>* %vfr, align 16
+  %2 = load <2 x double>, <2 x double>* %vd, align 16
+  %3 = call <2 x double> @llvm.ppc.vsx.xvrsqrtedp(<2 x double> %2)
+; CHECK: xvrsqrtedp {{[0-9]+}}, {{[0-9]+}}
+  store <2 x double> %3, <2 x double>* %vdr, align 16
+  ret void
+}
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Hrm. I'd suggest running this through the optimizer but since it's just using locals that don't have external visibility it might not work. Though if the instruction selector ever does any DCE on allocas then there's going to be a problem here. Might want to have it take arguments and return something?

http://reviews.llvm.org/D10874

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