[llvm] r240795 - [X86]: Correctly sign-extend 16-bit immediate in CALL instruction.

[Douglas Katzman]

Author: dougk
Date: Fri Jun 26 11:58:59 2015
New Revision: 240795

URL: http://llvm.org/viewvc/llvm-project?rev=240795&view=rev
Log:
[X86]: Correctly sign-extend 16-bit immediate in CALL instruction.

Patch by Matthew Barney. Thanks!

Differential Revision: http://reviews.llvm.org/D9514

Modified:
    llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.cpp
    llvm/trunk/test/MC/Disassembler/X86/x86-16.txt
    llvm/trunk/test/MC/Disassembler/X86/x86-32.txt
    llvm/trunk/test/MC/Disassembler/X86/x86-64.txt

Modified: llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.cpp?rev=240795&r1=240794&r2=240795&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.cpp (original)
+++ llvm/trunk/lib/Target/X86/Disassembler/X86Disassembler.cpp Fri Jun 26 11:58:59 2015
@@ -551,9 +551,15 @@ static void translateImmediate(MCInst &m
   case TYPE_REL8:
     isBranch = true;
     pcrel = insn.startLocation + insn.immediateOffset + insn.immediateSize;
-    if(immediate & 0x80)
+    if (immediate & 0x80)
       immediate |= ~(0xffull);
     break;
+  case TYPE_REL16:
+    isBranch = true;
+    pcrel = insn.startLocation + insn.immediateOffset + insn.immediateSize;
+    if (immediate & 0x8000)
+      immediate |= ~(0xffffull);
+    break;
   case TYPE_REL32:
   case TYPE_REL64:
     isBranch = true;

Modified: llvm/trunk/test/MC/Disassembler/X86/x86-16.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/X86/x86-16.txt?rev=240795&r1=240794&r2=240795&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/X86/x86-16.txt (original)
+++ llvm/trunk/test/MC/Disassembler/X86/x86-16.txt Fri Jun 26 11:58:59 2015
@@ -786,3 +786,5 @@
 # CHECK: lretl
 0x66 0xcb
 
+# CHECK: callw	-1
+0xe8 0xff 0xff

Modified: llvm/trunk/test/MC/Disassembler/X86/x86-32.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/X86/x86-32.txt?rev=240795&r1=240794&r2=240795&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/X86/x86-32.txt (original)
+++ llvm/trunk/test/MC/Disassembler/X86/x86-32.txt Fri Jun 26 11:58:59 2015
@@ -54,6 +54,9 @@
 # CHECK: calll	-1234
 0xe8 0x2e 0xfb 0xff 0xff
 
+# CHECK: callw	-1
+0x66 0xe8 0xff 0xff
+
 # CHECK: lfence
 0x0f 0xae 0xe8
 

Modified: llvm/trunk/test/MC/Disassembler/X86/x86-64.txt
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/Disassembler/X86/x86-64.txt?rev=240795&r1=240794&r2=240795&view=diff
==============================================================================
--- llvm/trunk/test/MC/Disassembler/X86/x86-64.txt (original)
+++ llvm/trunk/test/MC/Disassembler/X86/x86-64.txt Fri Jun 26 11:58:59 2015
@@ -339,3 +339,9 @@
 # CHECK: vaddps (%rdx,%xmm1), %zmm20, %zmm15
 # FIXME: vaddps (%rdx,%rcx), %zmm20, %zmm15
 0x62 0x71 0x5c 0x40 0x58 0x3c 0x0a
+
+# CHECK: callq 32767
+0xe8 0xff 0x7f 0x00 0x00
+
+# CHECK: callq -32769
+0xe8 0xff 0x7f 0xff 0xff