[llvm] r240595 - [GVN] Intersect the IR flags when CSE'ing two instructions

[David Majnemer]

Author: majnemer
Date: Wed Jun 24 16:52:25 2015
New Revision: 240595

URL: http://llvm.org/viewvc/llvm-project?rev=240595&view=rev
Log:
[GVN] Intersect the IR flags when CSE'ing two instructions

We performed a simple, but incomplete, intersection when it came time to
CSE instructions.  It didn't handle, for example, the 'exact' flag.

This fixes PR23922.

Modified:
    llvm/trunk/lib/Transforms/Scalar/GVN.cpp
    llvm/trunk/test/Transforms/GVN/pr12979.ll

Modified: llvm/trunk/lib/Transforms/Scalar/GVN.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/Scalar/GVN.cpp?rev=240595&r1=240594&r2=240595&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/Scalar/GVN.cpp (original)
+++ llvm/trunk/lib/Transforms/Scalar/GVN.cpp Wed Jun 24 16:52:25 2015
@@ -1783,13 +1783,9 @@ static void patchReplacementInstruction(
   // being replaced.
   BinaryOperator *Op = dyn_cast<BinaryOperator>(I);
   BinaryOperator *ReplOp = dyn_cast<BinaryOperator>(Repl);
-  if (Op && ReplOp && isa<OverflowingBinaryOperator>(Op) &&
-      isa<OverflowingBinaryOperator>(ReplOp)) {
-    if (ReplOp->hasNoSignedWrap() && !Op->hasNoSignedWrap())
-      ReplOp->setHasNoSignedWrap(false);
-    if (ReplOp->hasNoUnsignedWrap() && !Op->hasNoUnsignedWrap())
-      ReplOp->setHasNoUnsignedWrap(false);
-  }
+  if (Op && ReplOp)
+    ReplOp->andIRFlags(Op);
+
   if (Instruction *ReplInst = dyn_cast<Instruction>(Repl)) {
     // FIXME: If both the original and replacement value are part of the
     // same control-flow region (meaning that the execution of one

Modified: llvm/trunk/test/Transforms/GVN/pr12979.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/GVN/pr12979.ll?rev=240595&r1=240594&r2=240595&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/GVN/pr12979.ll (original)
+++ llvm/trunk/test/Transforms/GVN/pr12979.ll Wed Jun 24 16:52:25 2015
@@ -77,3 +77,17 @@ define i32 @test7(i32 %x, i32 %y) {
   %foo = add i32 %add1, %add2
   ret i32 %foo
 }
+
+declare void @mumble(i2, i2)
+
+define void @test8(i2 %x) {
+; CHECK-LABEL: @test8(
+; CHECK:      %[[ashr:.*]] = ashr i2 %x, 1
+; CHECK-NEXT: call void @mumble(i2 %[[ashr]], i2 %[[ashr]])
+; CHECK-NEXT: ret void
+
+  %ashr0 = ashr exact i2 %x, 1
+  %ashr1 = ashr i2 %x, 1
+  call void @mumble(i2 %ashr0, i2 %ashr1)
+  ret void
+}