[llvm] r240481 - MIR Serialization: Serialize immediate machine operands.
Alex Lorenz
arphaman at gmail.com
Tue Jun 23 16:42:29 PDT 2015
Author: arphaman
Date: Tue Jun 23 18:42:28 2015
New Revision: 240481
URL: http://llvm.org/viewvc/llvm-project?rev=240481&view=rev
Log:
MIR Serialization: Serialize immediate machine operands.
Reviewers: Duncan P. N. Exon Smith
Differential Revision: http://reviews.llvm.org/D10573
Added:
llvm/trunk/test/CodeGen/MIR/X86/immediate-operands.mir
Modified:
llvm/trunk/lib/CodeGen/MIRParser/MILexer.cpp
llvm/trunk/lib/CodeGen/MIRParser/MILexer.h
llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp
llvm/trunk/lib/CodeGen/MIRPrinter.cpp
Modified: llvm/trunk/lib/CodeGen/MIRParser/MILexer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MIRParser/MILexer.cpp?rev=240481&r1=240480&r2=240481&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MIRParser/MILexer.cpp (original)
+++ llvm/trunk/lib/CodeGen/MIRParser/MILexer.cpp Tue Jun 23 18:42:28 2015
@@ -33,7 +33,7 @@ public:
bool isEOF() const { return Ptr == End; }
- char peek() const { return isEOF() ? 0 : *Ptr; }
+ char peek(unsigned I = 0) const { return End - Ptr <= I ? 0 : Ptr[I]; }
void advance() { ++Ptr; }
@@ -77,6 +77,16 @@ static Cursor lexPercent(Cursor C, MITok
return C;
}
+static Cursor lexIntegerLiteral(Cursor C, MIToken &Token) {
+ auto Range = C;
+ C.advance();
+ while (isdigit(C.peek()))
+ C.advance();
+ StringRef StrVal = Range.upto(C);
+ Token = MIToken(MIToken::IntegerLiteral, StrVal, APSInt(StrVal));
+ return C;
+}
+
static MIToken::TokenKind symbolToken(char C) {
switch (C) {
case ',':
@@ -109,6 +119,8 @@ StringRef llvm::lexMIToken(
return lexIdentifier(C, Token).remaining();
if (Char == '%')
return lexPercent(C, Token).remaining();
+ if (isdigit(Char) || (Char == '-' && isdigit(C.peek(1))))
+ return lexIntegerLiteral(C, Token).remaining();
MIToken::TokenKind Kind = symbolToken(Char);
if (Kind != MIToken::Error)
return lexSymbol(C, Kind, Token).remaining();
Modified: llvm/trunk/lib/CodeGen/MIRParser/MILexer.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MIRParser/MILexer.h?rev=240481&r1=240480&r2=240481&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MIRParser/MILexer.h (original)
+++ llvm/trunk/lib/CodeGen/MIRParser/MILexer.h Tue Jun 23 18:42:28 2015
@@ -15,6 +15,7 @@
#ifndef LLVM_LIB_CODEGEN_MIRPARSER_MILEXER_H
#define LLVM_LIB_CODEGEN_MIRPARSER_MILEXER_H
+#include "llvm/ADT/APSInt.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/STLExtras.h"
#include <functional>
@@ -36,16 +37,23 @@ struct MIToken {
// Identifier tokens
Identifier,
- NamedRegister
+ NamedRegister,
+
+ // Other tokens
+ IntegerLiteral
};
private:
TokenKind Kind;
StringRef Range;
+ APSInt IntVal;
public:
MIToken(TokenKind Kind, StringRef Range) : Kind(Kind), Range(Range) {}
+ MIToken(TokenKind Kind, StringRef Range, const APSInt &IntVal)
+ : Kind(Kind), Range(Range), IntVal(IntVal) {}
+
TokenKind kind() const { return Kind; }
bool isError() const { return Kind == Error; }
@@ -59,6 +67,8 @@ public:
StringRef::iterator location() const { return Range.begin(); }
StringRef stringValue() const { return Range; }
+
+ const APSInt &integerValue() const { return IntVal; }
};
/// Consume a single machine instruction token in the given source and return
Modified: llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp?rev=240481&r1=240480&r2=240481&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp (original)
+++ llvm/trunk/lib/CodeGen/MIRParser/MIParser.cpp Tue Jun 23 18:42:28 2015
@@ -57,6 +57,7 @@ public:
bool parseRegister(unsigned &Reg);
bool parseRegisterOperand(MachineOperand &Dest, bool IsDef = false);
+ bool parseImmediateOperand(MachineOperand &Dest);
bool parseMachineOperand(MachineOperand &Dest);
private:
@@ -197,10 +198,23 @@ bool MIParser::parseRegisterOperand(Mach
return false;
}
+bool MIParser::parseImmediateOperand(MachineOperand &Dest) {
+ assert(Token.is(MIToken::IntegerLiteral));
+ const APSInt &Int = Token.integerValue();
+ if (Int.getMinSignedBits() > 64)
+ // TODO: Replace this with an error when we can parse CIMM Machine Operands.
+ llvm_unreachable("Can't parse large integer literals yet!");
+ Dest = MachineOperand::CreateImm(Int.getExtValue());
+ lex();
+ return false;
+}
+
bool MIParser::parseMachineOperand(MachineOperand &Dest) {
switch (Token.kind()) {
case MIToken::NamedRegister:
return parseRegisterOperand(Dest);
+ case MIToken::IntegerLiteral:
+ return parseImmediateOperand(Dest);
case MIToken::Error:
return true;
default:
Modified: llvm/trunk/lib/CodeGen/MIRPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MIRPrinter.cpp?rev=240481&r1=240480&r2=240481&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MIRPrinter.cpp (original)
+++ llvm/trunk/lib/CodeGen/MIRPrinter.cpp Tue Jun 23 18:42:28 2015
@@ -159,6 +159,9 @@ void MIPrinter::print(const MachineOpera
printReg(Op.getReg(), OS, TRI);
// TODO: Print sub register.
break;
+ case MachineOperand::MO_Immediate:
+ OS << Op.getImm();
+ break;
default:
// TODO: Print the other machine operands.
llvm_unreachable("Can't print this machine operand at the moment");
Added: llvm/trunk/test/CodeGen/MIR/X86/immediate-operands.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/immediate-operands.mir?rev=240481&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/immediate-operands.mir (added)
+++ llvm/trunk/test/CodeGen/MIR/X86/immediate-operands.mir Tue Jun 23 18:42:28 2015
@@ -0,0 +1,38 @@
+# RUN: llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s | FileCheck %s
+# This test ensures that the MIR parser parses immediate machine operands.
+
+--- |
+
+ define i32 @foo() {
+ entry:
+ ret i32 42
+ }
+
+ define i32 @bar() {
+ entry:
+ ret i32 -11
+ }
+
+...
+---
+# CHECK: name: foo
+name: foo
+body:
+ - name: entry
+ instructions:
+ # CHECK: - '%eax = MOV32ri 42'
+ # CHECK-NEXT: - 'RETQ %eax'
+ - '%eax = MOV32ri 42'
+ - 'RETQ %eax'
+...
+---
+# CHECK: name: bar
+name: bar
+body:
+ - name: entry
+ instructions:
+ # CHECK: - '%eax = MOV32ri -11'
+ # CHECK-NEXT: - 'RETQ %eax'
+ - '%eax = MOV32ri -11'
+ - 'RETQ %eax'
+...
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