[llvm] r240474 - MIR Parser: Use correct source locations for machine instruction diagnostics.

Alex Lorenz arphaman at gmail.com
Tue Jun 23 15:39:24 PDT 2015


Author: arphaman
Date: Tue Jun 23 17:39:23 2015
New Revision: 240474

URL: http://llvm.org/viewvc/llvm-project?rev=240474&view=rev
Log:
MIR Parser: Use correct source locations for machine instruction diagnostics.

This commit translates the source locations for MIParser diagnostics from
the locations in the machine instruction string to the locations in the
MIR file.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10574

Modified:
    llvm/trunk/include/llvm/CodeGen/MIRYamlMapping.h
    llvm/trunk/lib/CodeGen/MIRParser/MIRParser.cpp
    llvm/trunk/test/CodeGen/MIR/X86/expected-machine-operand.mir
    llvm/trunk/test/CodeGen/MIR/X86/missing-comma.mir
    llvm/trunk/test/CodeGen/MIR/X86/missing-instruction.mir
    llvm/trunk/test/CodeGen/MIR/X86/unknown-instruction.mir
    llvm/trunk/test/CodeGen/MIR/X86/unknown-register.mir
    llvm/trunk/test/CodeGen/MIR/X86/unrecognized-character.mir

Modified: llvm/trunk/include/llvm/CodeGen/MIRYamlMapping.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MIRYamlMapping.h?rev=240474&r1=240473&r2=240474&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MIRYamlMapping.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MIRYamlMapping.h Tue Jun 23 17:39:23 2015
@@ -22,7 +22,43 @@
 #include "llvm/Support/YAMLTraits.h"
 #include <vector>
 
-LLVM_YAML_IS_SEQUENCE_VECTOR(std::string)
+namespace llvm {
+namespace yaml {
+
+/// A wrapper around std::string which contains a source range that's being
+/// set during parsing.
+struct StringValue {
+  std::string Value;
+  SMRange SourceRange;
+
+  StringValue() {}
+  StringValue(std::string Value) : Value(std::move(Value)) {}
+
+  bool operator==(const StringValue &Other) const {
+    return Value == Other.Value;
+  }
+};
+
+template <> struct ScalarTraits<StringValue> {
+  static void output(const StringValue &S, void *, llvm::raw_ostream &OS) {
+    OS << S.Value;
+  }
+
+  static StringRef input(StringRef Scalar, void *Ctx, StringValue &S) {
+    S.Value = Scalar.str();
+    if (const auto *Node =
+            reinterpret_cast<yaml::Input *>(Ctx)->getCurrentNode())
+      S.SourceRange = Node->getSourceRange();
+    return "";
+  }
+
+  static bool mustQuote(StringRef Scalar) { return needsQuotes(Scalar); }
+};
+
+} // end namespace yaml
+} // end namespace llvm
+
+LLVM_YAML_IS_SEQUENCE_VECTOR(llvm::yaml::StringValue)
 
 namespace llvm {
 namespace yaml {
@@ -34,7 +70,7 @@ struct MachineBasicBlock {
   bool AddressTaken = false;
   // TODO: Serialize the successors and liveins.
 
-  std::vector<std::string> Instructions;
+  std::vector<StringValue> Instructions;
 };
 
 template <> struct MappingTraits<MachineBasicBlock> {

Modified: llvm/trunk/lib/CodeGen/MIRParser/MIRParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MIRParser/MIRParser.cpp?rev=240474&r1=240473&r2=240474&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MIRParser/MIRParser.cpp (original)
+++ llvm/trunk/lib/CodeGen/MIRParser/MIRParser.cpp Tue Jun 23 17:39:23 2015
@@ -84,6 +84,10 @@ public:
                                    const yaml::MachineBasicBlock &YamlMBB);
 
 private:
+  /// Return a MIR diagnostic converted from an MI string diagnostic.
+  SMDiagnostic diagFromMIStringDiag(const SMDiagnostic &Error,
+                                    SMRange SourceRange);
+
   /// Return a MIR diagnostic converted from an LLVM assembly diagnostic.
   SMDiagnostic diagFromLLVMAssemblyDiag(const SMDiagnostic &Error,
                                         SMRange SourceRange);
@@ -129,6 +133,7 @@ static void handleYAMLDiag(const SMDiagn
 std::unique_ptr<Module> MIRParserImpl::parse() {
   yaml::Input In(SM.getMemoryBuffer(SM.getMainFileID())->getBuffer(),
                  /*Ctxt=*/nullptr, handleYAMLDiag, this);
+  In.setContext(&In);
 
   if (!In.setCurrentDocument()) {
     if (In.error())
@@ -235,16 +240,32 @@ bool MIRParserImpl::initializeMachineBas
   // Parse the instructions.
   for (const auto &MISource : YamlMBB.Instructions) {
     SMDiagnostic Error;
-    if (auto *MI = parseMachineInstr(SM, MF, MISource, Error)) {
+    if (auto *MI = parseMachineInstr(SM, MF, MISource.Value, Error)) {
       MBB.insert(MBB.end(), MI);
       continue;
     }
-    reportDiagnostic(Error);
+    reportDiagnostic(diagFromMIStringDiag(Error, MISource.SourceRange));
     return true;
   }
   return false;
 }
 
+SMDiagnostic MIRParserImpl::diagFromMIStringDiag(const SMDiagnostic &Error,
+                                                 SMRange SourceRange) {
+  assert(SourceRange.isValid() && "Invalid source range");
+  SMLoc Loc = SourceRange.Start;
+  bool HasQuote = Loc.getPointer() < SourceRange.End.getPointer() &&
+                  *Loc.getPointer() == '\'';
+  // Translate the location of the error from the location in the MI string to
+  // the corresponding location in the MIR file.
+  Loc = Loc.getFromPointer(Loc.getPointer() + Error.getColumnNo() +
+                           (HasQuote ? 1 : 0));
+
+  // TODO: Translate any source ranges as well.
+  return SM.GetMessage(Loc, Error.getKind(), Error.getMessage(), None,
+                       Error.getFixIts());
+}
+
 SMDiagnostic MIRParserImpl::diagFromLLVMAssemblyDiag(const SMDiagnostic &Error,
                                                      SMRange SourceRange) {
   assert(SourceRange.isValid());

Modified: llvm/trunk/test/CodeGen/MIR/X86/expected-machine-operand.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/expected-machine-operand.mir?rev=240474&r1=240473&r2=240474&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/expected-machine-operand.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/expected-machine-operand.mir Tue Jun 23 17:39:23 2015
@@ -13,7 +13,7 @@ name:            foo
 body:
  - name:         entry
    instructions:
-     # CHECK: 1:16: expected a machine operand
+     # CHECK: [[@LINE+1]]:24: expected a machine operand
      - '%eax = XOR32rr ='
      - 'RETQ %eax'
 ...

Modified: llvm/trunk/test/CodeGen/MIR/X86/missing-comma.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/missing-comma.mir?rev=240474&r1=240473&r2=240474&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/missing-comma.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/missing-comma.mir Tue Jun 23 17:39:23 2015
@@ -13,7 +13,7 @@ name:            foo
 body:
  - name:         entry
    instructions:
-     # CHECK: 1:21: expected ',' before the next machine operand
+     # CHECK: [[@LINE+1]]:29: expected ',' before the next machine operand
      - '%eax = XOR32rr %eax %eflags'
      - 'RETQ %eax'
 ...

Modified: llvm/trunk/test/CodeGen/MIR/X86/missing-instruction.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/missing-instruction.mir?rev=240474&r1=240473&r2=240474&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/missing-instruction.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/missing-instruction.mir Tue Jun 23 17:39:23 2015
@@ -13,6 +13,6 @@ name:            foo
 body:
  - name:         entry
    instructions:
-     # CHECK: 1:1: expected a machine instruction
+     # CHECK: [[@LINE+1]]:9: expected a machine instruction
      - ''
 ...

Modified: llvm/trunk/test/CodeGen/MIR/X86/unknown-instruction.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/unknown-instruction.mir?rev=240474&r1=240473&r2=240474&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/unknown-instruction.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/unknown-instruction.mir Tue Jun 23 17:39:23 2015
@@ -15,6 +15,6 @@ name:            foo
 body:
  - name:         entry
    instructions:
-     # CHECK: 1:1: unknown machine instruction name 'retJust0'
+     # CHECK: [[@LINE+1]]:8: unknown machine instruction name 'retJust0'
      - retJust0
 ...

Modified: llvm/trunk/test/CodeGen/MIR/X86/unknown-register.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/unknown-register.mir?rev=240474&r1=240473&r2=240474&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/unknown-register.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/unknown-register.mir Tue Jun 23 17:39:23 2015
@@ -15,7 +15,7 @@ name:            foo
 body:
  - name:         entry
    instructions:
-     # CHECK: 1:1: unknown register name 'xax'
+     # CHECK: [[@LINE+1]]:9: unknown register name 'xax'
      - '%xax = MOV32r0'
      - 'RETQ %xax'
 ...

Modified: llvm/trunk/test/CodeGen/MIR/X86/unrecognized-character.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/X86/unrecognized-character.mir?rev=240474&r1=240473&r2=240474&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/X86/unrecognized-character.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/X86/unrecognized-character.mir Tue Jun 23 17:39:23 2015
@@ -13,6 +13,6 @@ name:            foo
 body:
  - name:         entry
    instructions:
-     # CHECK: 1:1: unexpected character '`'
+     # CHECK: [[@LINE+1]]:9: unexpected character '`'
      - '` RETQ'
 ...





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