[PATCH] [mips] [IAS] Add partial support for the ULHU pseudo-instruction.

[Daniel Sanders]

I agree we've covered all the comments. LGTM


================
Comment at: lib/Target/Mips/AsmParser/MipsAsmParser.cpp:2508-2510
@@ +2507,5 @@
+    // NOTE: We do this (D)ADDu here instead of doing it in loadImmediate()
+    // because it will make our output more similar to GAS' (e.g. using $0 as
+    // the second operand for an ORi and then doing an ADDu with SrcReg, when we
+    // could've used SrcReg as the second operand for the ORi).
+    // NOTE: If there is no source register specified in the ULHU, the parser
----------------
I found this clarification a bit confusing at first. It might be better to write out the instructions.

http://reviews.llvm.org/D9671

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