[PATCH] [mips] Add support for branch-likely pseudo-instructions

[Daniel Sanders]

> New diff contains fix for error reporting when branch likely instructions are used on mips32r6/mips64r6.


I should have thought of that :-). Could you add test cases for this?

> Please, take a look at AsmToken::Identifier case, since I am not sure this is the right way to parse a label.


You shouldn't need any of the code you added for this. We can already parse labels so specifying 'brtarget' should be sufficient. I'll take a quick look.


================
Comment at: lib/Target/Mips/AsmParser/MipsAsmParser.cpp:2383-2385
@@ -2354,5 +2382,5 @@
     }
-    // If both registers are $0 and the pseudo-branch does not accept
-    // equality, it will never be taken, so we don't have to emit anything.
-    return false;
+      // If both registers are $0 and the pseudo-branch does not accept
+      // equality, it will never be taken, so we don't have to emit anything.
+      return false;
   }
----------------
Nit: You seem to have added some extra indentation since the last version of your patch. It was correct in the previous patch

================
Comment at: lib/Target/Mips/MipsInstrInfo.td:1698
@@ -1697,3 +1697,3 @@
                                  brtarget:$offset),
-                    !strconcat(instr_asm, "\t$rs, $rt, $offset")>;
+                    !strconcat(instr_asm, "\t$rs, $rt, $offset")>, PredicateControl;
 }
----------------
PredicateControl belongs on MipsAsmPseudoInst rather than CondBranchPseudo

http://reviews.llvm.org/D10537

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