[PATCH] [AArch64][ARM] Match interleaved memory accesses into ldN/stN/vldN/vstN intrinsics.
silviu.baranga at arm.com
silviu.baranga at arm.com
Thu Jun 18 09:30:03 PDT 2015
================
Comment at: lib/Target/ARM/ARMTargetMachine.cpp:41
@@ -40,1 +40,3 @@
static cl::opt<bool>
+ARMInterleavedAccessOpt("arm-interleaved-access-opt", cl::Hidden,
+ cl::desc("Optimize interleaved memory accesses"
----------------
Would it be better to only have one switch in the interleave pass instead of having a separate switch in each backend?
The pass could return when executing runOnFunction if the option is not enabled.
http://reviews.llvm.org/D10533
EMAIL PREFERENCES
http://reviews.llvm.org/settings/panel/emailpreferences/
More information about the llvm-commits
mailing list