[lld] r239960 - [Mips] Support R_MICROMIPS_GPREL16 / R_MICROMIPS_GPREL7_S2 relocations handling
Simon Atanasyan
simon at atanasyan.com
Wed Jun 17 15:27:57 PDT 2015
Author: atanasyan
Date: Wed Jun 17 17:27:54 2015
New Revision: 239960
URL: http://llvm.org/viewvc/llvm-project?rev=239960&view=rev
Log:
[Mips] Support R_MICROMIPS_GPREL16 / R_MICROMIPS_GPREL7_S2 relocations handling
Added:
lld/trunk/test/elf/Mips/rel-gprel16-micro-overflow.test
lld/trunk/test/elf/Mips/rel-gprel16-micro.test
lld/trunk/test/elf/Mips/rel-gprel7-micro-overflow.test
lld/trunk/test/elf/Mips/rel-gprel7-micro.test
Modified:
lld/trunk/lib/ReaderWriter/ELF/Mips/MipsRelocationHandler.cpp
lld/trunk/lib/ReaderWriter/ELF/Mips/MipsRelocationPass.cpp
Modified: lld/trunk/lib/ReaderWriter/ELF/Mips/MipsRelocationHandler.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/lib/ReaderWriter/ELF/Mips/MipsRelocationHandler.cpp?rev=239960&r1=239959&r2=239960&view=diff
==============================================================================
--- lld/trunk/lib/ReaderWriter/ELF/Mips/MipsRelocationHandler.cpp (original)
+++ lld/trunk/lib/ReaderWriter/ELF/Mips/MipsRelocationHandler.cpp Wed Jun 17 17:27:54 2015
@@ -123,6 +123,10 @@ static MipsRelocationParams getRelocatio
case R_MIPS_TLS_TPREL_HI16:
case R_MIPS_TLS_TPREL_LO16:
return {4, 0xffff, 0, false, dummyCheck};
+ case R_MICROMIPS_GPREL16:
+ return {4, 0xffff, 0, true, signedCheck<16>};
+ case R_MICROMIPS_GPREL7_S2:
+ return {4, 0x7f, 2, false, signedCheck<9>};
case R_MICROMIPS_GOT_HI16:
case R_MICROMIPS_GOT_LO16:
case R_MICROMIPS_CALL_HI16:
@@ -527,6 +531,9 @@ static ErrorOr<int64_t> calculateRelocat
return relocGPRel16(tgtAddr, addend, gpAddr);
case R_MIPS_GPREL32:
return relocGPRel32(tgtAddr, addend, gpAddr);
+ case R_MICROMIPS_GPREL16:
+ case R_MICROMIPS_GPREL7_S2:
+ return tgtAddr + addend - gpAddr;
case R_MIPS_JALR:
case R_MICROMIPS_JALR:
// We do not do JALR optimization now.
@@ -704,7 +711,10 @@ Reference::Addend readMipsRelocAddend(Re
int64_t res = (ins & params._mask) << params._shift;
switch (kind) {
case R_MIPS_GPREL16:
+ case R_MICROMIPS_GPREL16:
return llvm::SignExtend32<16>(res);
+ case R_MICROMIPS_GPREL7_S2:
+ return llvm::SignExtend32<9>(res);
default:
// Nothing to do
break;
Modified: lld/trunk/lib/ReaderWriter/ELF/Mips/MipsRelocationPass.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/lib/ReaderWriter/ELF/Mips/MipsRelocationPass.cpp?rev=239960&r1=239959&r2=239960&view=diff
==============================================================================
--- lld/trunk/lib/ReaderWriter/ELF/Mips/MipsRelocationPass.cpp (original)
+++ lld/trunk/lib/ReaderWriter/ELF/Mips/MipsRelocationPass.cpp Wed Jun 17 17:27:54 2015
@@ -568,6 +568,8 @@ void RelocationPass<ELFT>::handleReferen
// Nothing to do. We create GOT page entry in the R_MIPS_GOT_PAGE handler.
break;
case R_MIPS_GPREL16:
+ case R_MICROMIPS_GPREL16:
+ case R_MICROMIPS_GPREL7_S2:
if (isLocal(ref.target()))
ref.setAddend(ref.addend() + atom.file().getGP0());
break;
@@ -612,6 +614,8 @@ static bool isConstrainSym(const MipsELF
case R_MICROMIPS_JALR:
case R_MIPS_GPREL16:
case R_MIPS_GPREL32:
+ case R_MICROMIPS_GPREL16:
+ case R_MICROMIPS_GPREL7_S2:
return false;
default:
return true;
Added: lld/trunk/test/elf/Mips/rel-gprel16-micro-overflow.test
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/elf/Mips/rel-gprel16-micro-overflow.test?rev=239960&view=auto
==============================================================================
--- lld/trunk/test/elf/Mips/rel-gprel16-micro-overflow.test (added)
+++ lld/trunk/test/elf/Mips/rel-gprel16-micro-overflow.test Wed Jun 17 17:27:54 2015
@@ -0,0 +1,57 @@
+# Check R_MICROMIPS_GPREL16 relocation overflow handling.
+#
+# RUN: yaml2obj -format=elf %s > %t.o
+# RUN: not lld -flavor gnu -target mipsel -shared -o %t.so %t.o 2>&1 \
+# RUN: | FileCheck %s
+
+# CHECK: Relocation out of range in file {{.*}} reference from +0 to L0+0 of type 136 (R_MICROMIPS_GPREL16)
+# CHECK: Relocation out of range in file {{.*}} reference from +4 to G0+0 of type 136 (R_MICROMIPS_GPREL16)
+
+FileHeader:
+ Class: ELFCLASS32
+ Data: ELFDATA2LSB
+ Type: ET_REL
+ Machine: EM_MIPS
+ Flags: [EF_MIPS_PIC, EF_MIPS_CPIC, EF_MIPS_ABI_O32,
+ EF_MIPS_ARCH_32R2, EF_MIPS_MICROMIPS]
+
+Sections:
+- Type: SHT_PROGBITS
+ Name: .text
+ Flags: [ SHF_ALLOC, SHF_EXECINSTR ]
+ AddressAlign: 4
+ Size: 8
+
+- Type: SHT_PROGBITS
+ Name: .rodata
+ Flags: [ SHF_ALLOC ]
+ AddressAlign: 4
+ Size: 8
+
+- Type: SHT_REL
+ Name: .rel.rodata
+ Link: .symtab
+ Info: .rodata
+ AddressAlign: 4
+ Relocations:
+ - Offset: 0
+ Symbol: L0
+ Type: R_MICROMIPS_GPREL16
+ - Offset: 4
+ Symbol: G0
+ Type: R_MICROMIPS_GPREL16
+
+Symbols:
+ Local:
+ - Name: L0
+ Section: .text
+ Value: 0
+ Size: 4
+ - Name: .rodata
+ Type: STT_SECTION
+ Section: .rodata
+ Global:
+ - Name: G0
+ Section: .text
+ Value: 4
+ Size: 4
Added: lld/trunk/test/elf/Mips/rel-gprel16-micro.test
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/elf/Mips/rel-gprel16-micro.test?rev=239960&view=auto
==============================================================================
--- lld/trunk/test/elf/Mips/rel-gprel16-micro.test (added)
+++ lld/trunk/test/elf/Mips/rel-gprel16-micro.test Wed Jun 17 17:27:54 2015
@@ -0,0 +1,78 @@
+# Check R_MICROMIPS_GPREL16 relocation handling.
+#
+# RUN: yaml2obj -format=elf %s > %t.o
+# RUN: lld -flavor gnu -target mipsel -shared -o %t.so %t.o
+# RUN: llvm-readobj -symbols %t.so | FileCheck -check-prefix=SYM %s
+# RUN: llvm-objdump -s %t.so | FileCheck -check-prefix=SEC %s
+
+# SYM: Name: L0
+# SYM-NEXT: Value: 0x104
+# SYM-NEXT: Size: 4
+
+# SYM: Name: G0
+# SYM-NEXT: Value: 0x108
+# SYM-NEXT: Size: 4
+
+# SYM: Name: _gp
+# SYM-NEXT: Value: 0x8FF0
+# SYM-NEXT: Size: 0
+
+# SEC: Contents of section .rodata:
+# SEC-NEXT: 010c 00001071 000017f1
+# ^ 0x104 (L0) + 0x10000 (GP0) - 0x8ff0 (_gp) - 4 = 0x7110
+# ^ 0x108 (G0) - 0x8ff0 (_gp) + 0x7fff = 0xf117
+
+FileHeader:
+ Class: ELFCLASS32
+ Data: ELFDATA2LSB
+ Type: ET_REL
+ Machine: EM_MIPS
+ Flags: [EF_MIPS_PIC, EF_MIPS_CPIC, EF_MIPS_ABI_O32,
+ EF_MIPS_ARCH_32R2, EF_MIPS_MICROMIPS]
+
+Sections:
+- Type: SHT_PROGBITS
+ Name: .text
+ Flags: [ SHF_ALLOC, SHF_EXECINSTR ]
+ AddressAlign: 4
+ Size: 8
+
+- Type: SHT_PROGBITS
+ Name: .rodata
+ Flags: [ SHF_ALLOC ]
+ AddressAlign: 4
+ Content: 0000fcff0000ff7f
+
+- Type: SHT_REL
+ Name: .rel.rodata
+ Link: .symtab
+ Info: .rodata
+ AddressAlign: 4
+ Relocations:
+ - Offset: 0
+ Symbol: L0
+ Type: R_MICROMIPS_GPREL16
+ - Offset: 4
+ Symbol: G0
+ Type: R_MICROMIPS_GPREL16
+
+- Type: SHT_MIPS_REGINFO
+ Name: .reginfo
+ Flags: [ SHF_ALLOC ]
+ AddressAlign: 1
+ Content: 000000000000000000000000000000000000000000000100
+
+Symbols:
+ Local:
+ - Name: L0
+ Section: .text
+ Value: 0
+ Size: 4
+ - Name: .rodata
+ Type: STT_SECTION
+ Section: .rodata
+ Global:
+ - Name: G0
+ Section: .text
+ Value: 4
+ Size: 4
Added: lld/trunk/test/elf/Mips/rel-gprel7-micro-overflow.test
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/elf/Mips/rel-gprel7-micro-overflow.test?rev=239960&view=auto
==============================================================================
--- lld/trunk/test/elf/Mips/rel-gprel7-micro-overflow.test (added)
+++ lld/trunk/test/elf/Mips/rel-gprel7-micro-overflow.test Wed Jun 17 17:27:54 2015
@@ -0,0 +1,48 @@
+# Check R_MICROMIPS_GPREL7_S2 relocation overflow handling.
+#
+# RUN: yaml2obj -format=elf %s > %t.o
+# RUN: not lld -flavor gnu -target mipsel -shared -o %t.so %t.o 2>&1 \
+# RUN: | FileCheck %s
+
+# CHECK: Relocation out of range in file {{.*}} reference from +0 to L0+-4 of type 172 (R_MICROMIPS_GPREL7_S2)
+
+FileHeader:
+ Class: ELFCLASS32
+ Data: ELFDATA2LSB
+ Type: ET_REL
+ Machine: EM_MIPS
+ Flags: [EF_MIPS_PIC, EF_MIPS_CPIC, EF_MIPS_ABI_O32,
+ EF_MIPS_ARCH_32R2, EF_MIPS_MICROMIPS]
+
+Sections:
+- Type: SHT_PROGBITS
+ Name: .text
+ Flags: [ SHF_ALLOC, SHF_EXECINSTR ]
+ AddressAlign: 4
+ Size: 4
+
+- Type: SHT_PROGBITS
+ Name: .rodata
+ Flags: [ SHF_ALLOC ]
+ AddressAlign: 4
+ Content: 7f000000
+
+- Type: SHT_REL
+ Name: .rel.rodata
+ Link: .symtab
+ Info: .rodata
+ AddressAlign: 4
+ Relocations:
+ - Offset: 0
+ Symbol: L0
+ Type: R_MICROMIPS_GPREL7_S2
+
+Symbols:
+ Local:
+ - Name: L0
+ Section: .text
+ Value: 0
+ Size: 4
+ - Name: .rodata
+ Type: STT_SECTION
+ Section: .rodata
Added: lld/trunk/test/elf/Mips/rel-gprel7-micro.test
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/elf/Mips/rel-gprel7-micro.test?rev=239960&view=auto
==============================================================================
--- lld/trunk/test/elf/Mips/rel-gprel7-micro.test (added)
+++ lld/trunk/test/elf/Mips/rel-gprel7-micro.test Wed Jun 17 17:27:54 2015
@@ -0,0 +1,65 @@
+# Check R_MICROMIPS_GPREL7_S2 relocation handling.
+#
+# RUN: yaml2obj -format=elf %s > %t.o
+# RUN: lld -flavor gnu -target mipsel -shared -o %t.so %t.o
+# RUN: llvm-readobj -symbols %t.so | FileCheck -check-prefix=SYM %s
+# RUN: llvm-objdump -s %t.so | FileCheck -check-prefix=SEC %s
+
+# SYM: Name: L0
+# SYM-NEXT: Value: 0xF0
+# SYM-NEXT: Size: 4
+
+# SYM: Name: _gp
+# SYM-NEXT: Value: 0x8FF0
+# SYM-NEXT: Size: 0
+
+# SEC: Contents of section .rodata:
+# SEC-NEXT: 0f4 3b000000
+# ^ 0xf0 (L0) + 0x8ff0 (GP0) - 0x8ff0 (_gp) - 4 = 0xec >> 2
+
+FileHeader:
+ Class: ELFCLASS32
+ Data: ELFDATA2LSB
+ Type: ET_REL
+ Machine: EM_MIPS
+ Flags: [EF_MIPS_PIC, EF_MIPS_CPIC, EF_MIPS_ABI_O32,
+ EF_MIPS_ARCH_32R2, EF_MIPS_MICROMIPS]
+
+Sections:
+- Type: SHT_PROGBITS
+ Name: .text
+ Flags: [ SHF_ALLOC, SHF_EXECINSTR ]
+ AddressAlign: 4
+ Size: 4
+
+- Type: SHT_PROGBITS
+ Name: .rodata
+ Flags: [ SHF_ALLOC ]
+ AddressAlign: 4
+ Content: 7f000000
+
+- Type: SHT_REL
+ Name: .rel.rodata
+ Link: .symtab
+ Info: .rodata
+ AddressAlign: 4
+ Relocations:
+ - Offset: 0
+ Symbol: L0
+ Type: R_MICROMIPS_GPREL7_S2
+
+- Type: SHT_MIPS_REGINFO
+ Name: .reginfo
+ Flags: [ SHF_ALLOC ]
+ AddressAlign: 1
+ Content: 0000000000000000000000000000000000000000f08f0000
+
+Symbols:
+ Local:
+ - Name: L0
+ Section: .text
+ Value: 0
+ Size: 4
+ - Name: .rodata
+ Type: STT_SECTION
+ Section: .rodata
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