[PATCH] ARM: Enable MachineScheduler and disable PostRAScheduler for swift CPU.

[Matthias Braun]

Hi grosbach, atrick,

This is mostly done to disable the PostRAScheduler which optimizes for
instruction latencies which isn't a good fit for out-of-order
architectures. This also allows to leave out the itinerary table in swift
in favor of the SchedModel one.

This change leads to performance improvements/regressions by as much as
10% in some benchmarks, in fact we loose 0.4% performance over the
llvm-testsuite for reasons that appear to be unknown or out of the
compilers control. rdar://20803802 documents the investigation of
these effects.

While it is probably a good idea to perform the same switch for the
other ARM out-of-order CPUs, I limited this change to swift as I cannot
perform the benchmark verification on the other CPUs.

REPOSITORY
  rL LLVM

http://reviews.llvm.org/D10513

Files:
  lib/Target/ARM/ARMScheduleSwift.td
  lib/Target/ARM/ARMSubtarget.cpp
  lib/Target/ARM/ARMSubtarget.h
  test/CodeGen/ARM/adv-copy-opt.ll
  test/CodeGen/ARM/avoid-cpsr-rmw.ll
  test/CodeGen/ARM/cmpxchg-idioms.ll
  test/CodeGen/ARM/test-sharedidx.ll
  test/CodeGen/ARM/vector-load.ll
  test/CodeGen/ARM/vector-store.ll

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