[PATCH] [AArch64] Match interleaved memory accesses into ldN/stN instructions.
James Molloy
james at jamesmolloy.co.uk
Wed Jun 17 01:19:08 PDT 2015
Hi Hao,
The code to create the new intrinsics seems to be quite small. Surely we
can just keep that separate, and pass it as an argument to the functions in
lib/CodeGen?
James
On Wed, 17 Jun 2015 at 09:15 Hao Liu <Hao.Liu at arm.com> wrote:
> ping...
>
> Do you guys have any idea about sharing the
> matchInterleavedLoad()/matchInterleavedStore()?
>
> If we can not share such function, I think we have to use two pass
> ARMInterleavedAccess and AArch64InterleavedAccess separately for ARM and
> AArch64 backends.
>
> Thanks,
> -Hao
>
>
> http://reviews.llvm.org/D10335
>
> EMAIL PREFERENCES
> http://reviews.llvm.org/settings/panel/emailpreferences/
>
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20150617/9a631bf7/attachment.html>
More information about the llvm-commits
mailing list