[llvm] r239837 - TargetRegisterInfo: Make the concept of imprecise lane masks explicit
Matthias Braun
matze at braunis.de
Tue Jun 16 11:22:26 PDT 2015
Author: matze
Date: Tue Jun 16 13:22:26 2015
New Revision: 239837
URL: http://llvm.org/viewvc/llvm-project?rev=239837&view=rev
Log:
TargetRegisterInfo: Make the concept of imprecise lane masks explicit
LaneMasks as given by getSubRegIndexLaneMask() have a limited number of
of bits, so for targets with more than 31 disjunct subregister there may
be cases where:
getSubReg(Reg,A) does not overlap getSubReg(Reg,B)
but we still have
(getSubRegIndexLaneMask(A) & getSubRegIndexLaneMask(B)) != 0.
I had hoped to keep this an implementation detail of the tablegen but as
my next commit shows we can avoid unnecessary imp-defs operands if we
know that the lane masks in use are precise.
This is in preparation to http://reviews.llvm.org/D10470.
Modified:
llvm/trunk/include/llvm/Target/TargetRegisterInfo.h
llvm/trunk/lib/CodeGen/RegisterCoalescer.cpp
Modified: llvm/trunk/include/llvm/Target/TargetRegisterInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetRegisterInfo.h?rev=239837&r1=239836&r2=239837&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/TargetRegisterInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetRegisterInfo.h Tue Jun 16 13:22:26 2015
@@ -373,6 +373,19 @@ public:
return SubRegIndexLaneMasks[SubIdx];
}
+ /// Returns true if the given lane mask is imprecise.
+ ///
+ /// LaneMasks as given by getSubRegIndexLaneMask() have a limited number of
+ /// bits, so for targets with more than 31 disjunct subregister indices there
+ /// may be cases where:
+ /// getSubReg(Reg,A) does not overlap getSubReg(Reg,B)
+ /// but we still have
+ /// (getSubRegIndexLaneMask(A) & getSubRegIndexLaneMask(B)) != 0.
+ /// This function returns true in those cases.
+ static bool isImpreciseLaneMask(unsigned LaneMask) {
+ return LaneMask & 0x80000000u;
+ }
+
/// The lane masks returned by getSubRegIndexLaneMask() above can only be
/// used to determine if sub-registers overlap - they can't be used to
/// determine if a set of sub-registers completely cover another
Modified: llvm/trunk/lib/CodeGen/RegisterCoalescer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegisterCoalescer.cpp?rev=239837&r1=239836&r2=239837&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegisterCoalescer.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegisterCoalescer.cpp Tue Jun 16 13:22:26 2015
@@ -2633,7 +2633,8 @@ bool RegisterCoalescer::joinVirtRegs(Coa
// "overflow bit" 32. As a workaround we drop all subregister ranges
// which means we loose some precision but are back to a well defined
// state.
- assert((CP.getNewRC()->getLaneMask() & 0x80000000u)
+ assert(TargetRegisterInfo::isImpreciseLaneMask(
+ CP.getNewRC()->getLaneMask())
&& "SubRange merge should only fail when merging into bit 32.");
DEBUG(dbgs() << "\tSubrange join aborted!\n");
LHS.clearSubRanges();
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