[lld] r239677 - [Mips] Support R_MIPS_PC16 relocation handling

Simon Atanasyan simon at atanasyan.com
Sat Jun 13 07:48:14 PDT 2015


Author: atanasyan
Date: Sat Jun 13 09:48:14 2015
New Revision: 239677

URL: http://llvm.org/viewvc/llvm-project?rev=239677&view=rev
Log:
[Mips] Support R_MIPS_PC16 relocation handling

Added:
    lld/trunk/test/elf/Mips/rel-pc16-align.test
    lld/trunk/test/elf/Mips/rel-pc16-overflow.test
    lld/trunk/test/elf/Mips/rel-pc16.test
Modified:
    lld/trunk/lib/ReaderWriter/ELF/Mips/MipsRelocationHandler.cpp

Modified: lld/trunk/lib/ReaderWriter/ELF/Mips/MipsRelocationHandler.cpp
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/lib/ReaderWriter/ELF/Mips/MipsRelocationHandler.cpp?rev=239677&r1=239676&r2=239677&view=diff
==============================================================================
--- lld/trunk/lib/ReaderWriter/ELF/Mips/MipsRelocationHandler.cpp (original)
+++ lld/trunk/lib/ReaderWriter/ELF/Mips/MipsRelocationHandler.cpp Sat Jun 13 09:48:14 2015
@@ -87,6 +87,8 @@ static MipsRelocationParams getRelocatio
   case R_MIPS_26:
   case LLD_R_MIPS_GLOBAL_26:
     return {4, 0x3ffffff, 2, false, dummyCheck};
+  case R_MIPS_PC16:
+    return {4, 0xffff, 2, false, signedCheck<18>};
   case R_MIPS_PC18_S3:
     return {4, 0x3ffff, 3, false, signedCheck<21>};
   case R_MIPS_PC19_S2:
@@ -295,6 +297,15 @@ static int64_t relocGPRel32(uint64_t S,
   return A + S - GP;
 }
 
+/// \brief R_MIPS_PC16
+/// local/external: (S + A - P) >> 2
+static ErrorOr<int64_t> relocPc16(uint64_t P, uint64_t S, int64_t A) {
+  A = llvm::SignExtend32<18>(A);
+  if ((S + A) & 3)
+    return make_unaligned_range_reloc_error();
+  return S + A - P;
+}
+
 /// \brief R_MIPS_PC18_S3, R_MICROMIPS_PC18_S3
 /// local/external: (S + A - P) >> 3 (P with cleared 3 less significant bits)
 static ErrorOr<int64_t> relocPc18(uint64_t P, uint64_t S, int64_t A) {
@@ -344,7 +355,7 @@ static int32_t relocPc10(uint64_t P, uin
 }
 
 /// \brief R_MICROMIPS_PC16_S1
-static int32_t relocPc16(uint64_t P, uint64_t S, int64_t A) {
+static int32_t relocPc16Micro(uint64_t P, uint64_t S, int64_t A) {
   A = llvm::SignExtend32<17>(A);
   return S + A - P;
 }
@@ -489,6 +500,8 @@ static ErrorOr<int64_t> calculateRelocat
   case R_MIPS_GOT_OFST:
   case R_MICROMIPS_GOT_OFST:
     return relocGOTOfst(tgtAddr, addend);
+  case R_MIPS_PC16:
+    return relocPc16(relAddr, tgtAddr, addend);
   case R_MIPS_PC18_S3:
   case R_MICROMIPS_PC18_S3:
     return relocPc18(relAddr, tgtAddr, addend);
@@ -506,7 +519,7 @@ static ErrorOr<int64_t> calculateRelocat
   case R_MICROMIPS_PC10_S1:
     return relocPc10(relAddr, tgtAddr, addend);
   case R_MICROMIPS_PC16_S1:
-    return relocPc16(relAddr, tgtAddr, addend);
+    return relocPc16Micro(relAddr, tgtAddr, addend);
   case R_MICROMIPS_PC23_S2:
     return relocPc23(relAddr, tgtAddr, addend);
   case R_MIPS_TLS_DTPREL_HI16:

Added: lld/trunk/test/elf/Mips/rel-pc16-align.test
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/elf/Mips/rel-pc16-align.test?rev=239677&view=auto
==============================================================================
--- lld/trunk/test/elf/Mips/rel-pc16-align.test (added)
+++ lld/trunk/test/elf/Mips/rel-pc16-align.test Sat Jun 13 09:48:14 2015
@@ -0,0 +1,43 @@
+# Check incorrect alignment handling for R_MIPS_PC16 relocation.
+
+# RUN: yaml2obj -format=elf %s > %t.o
+# RUN: not lld -flavor gnu -target mipsel -e T0 -o %t.exe %t.o 2>&1 \
+# RUN:       | FileCheck %s
+
+# CHECK: Relocation not aligned in file {{.*}} reference from T0+0 to T1+0 of type 10 (R_MIPS_PC16)
+
+FileHeader:
+  Class:   ELFCLASS32
+  Data:    ELFDATA2LSB
+  Type:    ET_REL
+  Machine: EM_MIPS
+  Flags:   [EF_MIPS_CPIC, EF_MIPS_ABI_O32, EF_MIPS_ARCH_32]
+
+Sections:
+- Name:         .text
+  Type:         SHT_PROGBITS
+  Size:         8
+  AddressAlign: 16
+  Flags:        [ SHF_ALLOC, SHF_EXECINSTR ]
+
+- Name:         .rel.text
+  Type:         SHT_REL
+  Info:         .text
+  AddressAlign: 4
+  Relocations:
+    - Offset: 0
+      Symbol: T1
+      Type:   R_MIPS_PC16
+
+Symbols:
+  Global:
+    - Name:    T0
+      Section: .text
+      Type:    STT_FUNC
+      Value:   0
+      Size:    8
+    - Name:    T1
+      Section: .text
+      Type:    STT_FUNC
+      Value:   6
+      Size:    2

Added: lld/trunk/test/elf/Mips/rel-pc16-overflow.test
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/elf/Mips/rel-pc16-overflow.test?rev=239677&view=auto
==============================================================================
--- lld/trunk/test/elf/Mips/rel-pc16-overflow.test (added)
+++ lld/trunk/test/elf/Mips/rel-pc16-overflow.test Sat Jun 13 09:48:14 2015
@@ -0,0 +1,45 @@
+# Check R_MIPS_PC16 relocation overflow handling.
+
+# RUN: yaml2obj -format=elf %s > %t.o
+# RUN: not lld -flavor gnu -target mipsel -e T0 -o %t.exe %t.o 2>&1 \
+# RUN:       | FileCheck %s
+
+# CHECK: Relocation out of range in file {{.*}} reference from T0+0 to T1+131068 of type 10 (R_MIPS_PC16)
+
+FileHeader:
+  Class:   ELFCLASS32
+  Data:    ELFDATA2LSB
+  Type:    ET_REL
+  Machine: EM_MIPS
+  Flags:   [EF_MIPS_CPIC, EF_MIPS_ABI_O32, EF_MIPS_ARCH_32]
+
+Sections:
+- Name:         .text
+  Type:         SHT_PROGBITS
+  Content:      "ff7f00000000000000000000"
+#                                ^ T1
+#                ^ T0 A := 0x7fff << 2 = 0x1fffc
+  AddressAlign: 16
+  Flags:        [ SHF_ALLOC, SHF_EXECINSTR ]
+
+- Name:         .rel.text
+  Type:         SHT_REL
+  Info:         .text
+  AddressAlign: 4
+  Relocations:
+    - Offset: 0
+      Symbol: T1
+      Type:   R_MIPS_PC16
+
+Symbols:
+  Global:
+    - Name:    T0
+      Section: .text
+      Type:    STT_FUNC
+      Value:   0
+      Size:    8
+    - Name:    T1
+      Section: .text
+      Type:    STT_FUNC
+      Value:   8
+      Size:    4

Added: lld/trunk/test/elf/Mips/rel-pc16.test
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/elf/Mips/rel-pc16.test?rev=239677&view=auto
==============================================================================
--- lld/trunk/test/elf/Mips/rel-pc16.test (added)
+++ lld/trunk/test/elf/Mips/rel-pc16.test Sat Jun 13 09:48:14 2015
@@ -0,0 +1,53 @@
+# Check handling of R_MIPS_PC16 relocation.
+
+# RUN: yaml2obj -format=elf %s > %t.o
+# RUN: lld -flavor gnu -target mipsel -e T0 -o %t.exe %t.o
+# RUN: llvm-objdump -s -t %t.exe | FileCheck %s
+
+# CHECK: Contents of section .text:
+# CHECK-NEXT: {{[0-9A-F]+}} feff0000 00000000 00000000
+#                           ^ V
+#                             A = -16 =>
+#                             V = (T1 - 16 - T0) >> 2 = -2
+
+# CHECK: SYMBOL TABLE:
+# CHECK: {{[0-9A-F]+}} g  F .text  00000008 T0
+# CHECK: {{[0-9A-F]+}} g  F .text  00000004 T1
+
+FileHeader:
+  Class:   ELFCLASS32
+  Data:    ELFDATA2LSB
+  Type:    ET_REL
+  Machine: EM_MIPS
+  Flags:   [EF_MIPS_CPIC, EF_MIPS_ABI_O32, EF_MIPS_ARCH_32]
+
+Sections:
+- Name:         .text
+  Type:         SHT_PROGBITS
+  Content:      "fcff00000000000000000000"
+#                                ^ T1
+#                ^ T0 A := 0xfffc << 2 = -16
+  AddressAlign: 16
+  Flags:        [ SHF_ALLOC, SHF_EXECINSTR ]
+
+- Name:         .rel.text
+  Type:         SHT_REL
+  Info:         .text
+  AddressAlign: 4
+  Relocations:
+    - Offset: 0
+      Symbol: T1
+      Type:   R_MIPS_PC16
+
+Symbols:
+  Global:
+    - Name:    T0
+      Section: .text
+      Type:    STT_FUNC
+      Value:   0
+      Size:    8
+    - Name:    T1
+      Section: .text
+      Type:    STT_FUNC
+      Value:   8
+      Size:    4





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