[PATCH] [AArch64] Match interleaved memory accesses into ldN/stN instructions.

[Michael Zolotukhin]

Hi Hao,

Thanks for the patch. The general idea sounds good to me, but I have some questions regarding some implementation details. To address them, it would actually be helpful to see the ARM32 patch too, since I expect that a lot of the stuff can be reused, as James and Renato have already mentioned.

For instance, functions like `isReInterleaveMask` look totally target independent. Would it be possible to make a target-independent implementation with a bunch of target hooks (like `getInterleavedStoreIntrinsic(Factor, Size)`)? Then, ARM32 and ARM64 patches would differ only in those hooks, while the rest of the code would be reused.


================
Comment at: lib/Target/AArch64/AArch64InterleavedAccess.cpp:146-148
@@ +145,5 @@
+                               unsigned &Index) {
+  unsigned NumElts = Mask.size();
+  if (NumElts < 2)
+    return false;
+
----------------
```
if (Mask.size() < 2)
  return false;
```
?

================
Comment at: lib/Target/AArch64/AArch64InterleavedAccess.cpp:247
@@ +246,3 @@
+
+    unsigned Index;
+    if (!isDeInterleaveMaskOfFactor(Shuffles[i]->getShuffleMask(), Factor,
----------------
Is there a need to redeclare `Index` here?

================
Comment at: lib/Target/AArch64/AArch64InterleavedAccess.cpp:279
@@ +278,3 @@
+    ShuffleVectorInst *SV = Shuffles[i];
+    unsigned Index = Indices[i];
+
----------------
One more redeclaration of `Index`.

================
Comment at: lib/Target/AArch64/AArch64InterleavedAccess.cpp:351
@@ +350,3 @@
+
+  SmallVector<Value *, 5> Ops;
+
----------------
Why `5`?

http://reviews.llvm.org/D10335

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