[PATCH] expose ILP for associative operations in the DAG

[escha]

> On Jun 4, 2015, at 1:25 PM, Sanjay Patel <spatel at rotateright.com> wrote:
> 
> I found my way to the "MachineCombiner" pass, and it seems like this optimization would fit right in there.
> 
> But I just thought of something scary: to do this reassociation on FP ops, we would have to extend fast-math-flags to MachineInstrs.

This kind of thing is actually (for ideal optimization, at least) necessary in some cases. For example, FMAs can increase register pressure, so it may be not only possible but totally sensible to add a pass to a GPU target to split certain FMAs around register allocation time when it determines they are detrimental to register count. Heuristics can be used to do this during ISel, but they tend to be very inaccurate at best; the full information necessary to know which FMAs to split is really only available later.

This would… unfortunately, technically require some sort of “fast math”.

—escha