[PATCH] [LoopVectorize]Teach Loop Vectorizer about interleaved memory access

[Adam Nemet]

In http://reviews.llvm.org/D9368#182273, @HaoLiu wrote:

> To my understanding, if a load has to wait until the store is committed, it is store-load forwarding. 
>  For the case:
>
>   A[i] = a;     (1)
>   b = A[i];     (2)
>
> (2)  has to waite (1) to be committed. It is store-load forwarding. After vectoring such case, it is still store-load forwarding.
>
> From comment in couldPreventStoreLoadForward, I think it means to prevent generating store-load forwarding by vectorization. If that is ture. The difference for this case is that it is original store-load forwarding. Do you mean that we could vectorize the cases that are original store-load forwarding?


The problem is not whether we can vectorize or not but because we can.  It's whether the resulting vector store and load will be subject to the processor's store-to-load forwarding optimization.  In this case the store does not have to get fully retired before the load could start executing (assuming an OOO core) but the memory unit will forward the value of the store to the load (and check whether there are intervening stores that make this invalid).

This is easy for the processor to figure out if both operations use the same address.  However if they are only partially overlapping it's hard.


http://reviews.llvm.org/D9368

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