[PATCH] [LoopVectorize]Teach Loop Vectorizer about interleaved memory access

[Hao Liu]

In http://reviews.llvm.org/D9368#182268, @anemet wrote:

> In http://reviews.llvm.org/D9368#181632, @HaoLiu wrote:
>
> > I also found a bug that write after load to the same location like:
> >
> >   A[i] = a;
> >   b = A[i];
> >
> > is not looked as store-load forwarding currently. As this could affect the correctness, I fixed this with slight modification. 2 new test cases are added.
>
>
> Why do you think that this is bug?  In this case because the vectorized loads and stores are aligned with each other, there should be no problem for the memory unit to figure out store-to-load forwarding.  See the big comment in MemoryDepChecker::couldPreventStoreLoadForward.


To my understanding, if a load has to wait until the store is committed, it is store-load forwarding. 
For the case:

  A[i] = a;     (1)
  b = A[i];     (2)

(2)  has to waite (1) to be committed. It is store-load forwarding. After vectoring such case, it is still store-load forwarding.

>From comment in couldPreventStoreLoadForward, I think it means to prevent generating store-load forwarding by vectorization. If that is ture. The difference for this case is that it is original store-load forwarding. Do you mean that we could vectorize the cases that are original store-load forwarding?

Thanks,
_hao


http://reviews.llvm.org/D9368

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