[PATCH] [mips] [IAS] Add support for LAReg with identical source and destination register operands.

[Daniel Sanders]

================
Comment at: lib/Target/Mips/AsmParser/MipsAsmParser.cpp:1738-1739
@@ -1737,1 +1737,4 @@
 
+  bool UseAT = false;
+  unsigned ATReg = 0;
+  if (UseSrcReg && (DstReg == SrcReg)) {
----------------
There's no need for UseAT. It's equivalent to ATReg == 0

================
Comment at: lib/Target/Mips/AsmParser/MipsAsmParser.cpp:1786
@@ -1774,3 +1785,3 @@
       tmpInst.setOpcode(Mips::ORi);
-      tmpInst.addOperand(MCOperand::createReg(DstReg));
+      tmpInst.addOperand(MCOperand::createReg(UseAT ? ATReg : DstReg));
       tmpInst.addOperand(MCOperand::createReg(Mips::ZERO));
----------------
The 'UseAT ? ATReg : DstReg' is repeated a number of times. Please use a variable to represent the temporary register.

================
Comment at: test/MC/Mips/mips-expansions.s:153
@@ -152,1 +152,3 @@
 
+# CHECK: ori  $8, $8, 20                # encoding: [0x14,0x00,0x08,0x35]
+# CHECK: lui  $1, 1                     # encoding: [0x01,0x00,0x01,0x3c]
----------------
I think this should be:
  addiu $8, $8, 20

http://reviews.llvm.org/D9367

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