[PATCH] [X86][SSE] Vectorized i8 and i16 shift operators
Simon Pilgrim
llvm-dev at redking.me.uk
Fri May 22 03:53:32 PDT 2015
Hi Fiona,
I did look at implementing more of the shifts as multiplies, but we end up using a lot of instructions (+ registers) for the extension/truncation stages. It is easier with SSE41 instructions, but at that point we can use PBLENDVB which gives a much tighter solution. It might still be worthwhile for constant shift amounts but that would be a later patch.
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http://reviews.llvm.org/D9474
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