[PATCH] VirtRegRewriter compile time reduction.

[Mehdi Amini]

Hi,

Your patch does not pass clang-format (80 columns limit for example).
It also seems to me that the loop you are adding could be a C++11 for-range loop.

— 
Mehdi

> On May 21, 2015, at 12:54 AM, Puyan Lotfi <plotfi at apple.com> wrote:
> 
> Hi
> 
> I have a patch (attached) for reducing compile time in VirtRegRewriter
> (especially for targets with a very high number of registers).
> 
> The patch changes how VirtRegRewriter::addMBBLiveIns adds registers to
> each MachineBasicBlock's LiveIns vector by adding registers to
> MachineBasicBlock::LiveIns without a isLiveIn check (the vector should
> be sorted and not have duplicates), and after all registers are added
> the LiveIns vector for each MachineBasicBlock for the current
> MachineFunction is sorted and uniqued (a call to sortUniqueLiveIns).
> This improves compile time by avoiding the O(LiveIns.size()) checks at
> every addLiveIn attempt which can get expensive if MRI->getNumVirtRegs()
> is high as this is number of iterations of the outer loop.
> 
> I'd like any feedback.
> 
> Thanks
> 
> PL
> 
> <VirtRegRewriterCompileTime.patch>_______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits