[llvm] r237837 - [Target/ARM] Only enable OptimizeBarrierPass at -O1 and above.

Davide Italiano davide at freebsd.org
Wed May 20 14:40:40 PDT 2015


Author: davide
Date: Wed May 20 16:40:38 2015
New Revision: 237837

URL: http://llvm.org/viewvc/llvm-project?rev=237837&view=rev
Log:
[Target/ARM] Only enable OptimizeBarrierPass at -O1 and above.

Ideally this is going to be and LLVM IR pass (shared, among others
with AArch64), but for the time being just enable it if consumers
ask us for optimization and not unconditionally.

Discussed with Tim Northover on IRC.

Added:
    llvm/trunk/test/CodeGen/ARM/noopt-dmb-v7.ll
Modified:
    llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp
    llvm/trunk/test/CodeGen/ARM/optimize-dmbs-v7.ll

Modified: llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp?rev=237837&r1=237836&r2=237837&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp Wed May 20 16:40:38 2015
@@ -402,6 +402,9 @@ void ARMPassConfig::addPreEmitPass() {
   if (getARMSubtarget().isThumb2())
     addPass(&UnpackMachineBundlesID);
 
-  addPass(createARMOptimizeBarriersPass());
+  // Don't optimize barriers at -O0.
+  if (getOptLevel() != CodeGenOpt::None)
+    addPass(createARMOptimizeBarriersPass());
+
   addPass(createARMConstantIslandPass());
 }

Added: llvm/trunk/test/CodeGen/ARM/noopt-dmb-v7.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/noopt-dmb-v7.ll?rev=237837&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/noopt-dmb-v7.ll (added)
+++ llvm/trunk/test/CodeGen/ARM/noopt-dmb-v7.ll Wed May 20 16:40:38 2015
@@ -0,0 +1,15 @@
+; Ensure that adjacent duplicated barriers are not removed at -O0.
+; RUN: llc -O0 < %s -mtriple=armv7 -mattr=+db | FileCheck %s
+
+define i32 @t1() {
+entry:
+  fence seq_cst
+  fence seq_cst
+  fence seq_cst
+  ret i32 0
+}
+
+; CHECK: @ BB#0: @ %entry
+; CHECK-NEXT: dmb ish
+; CHECK-NEXT: dmb ish
+; CHECK-NEXT: dmb ish

Modified: llvm/trunk/test/CodeGen/ARM/optimize-dmbs-v7.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/optimize-dmbs-v7.ll?rev=237837&r1=237836&r2=237837&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/optimize-dmbs-v7.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/optimize-dmbs-v7.ll Wed May 20 16:40:38 2015
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=armv7 -mattr=+db | FileCheck %s
+; RUN: llc -O1 < %s -mtriple=armv7 -mattr=+db | FileCheck %s
 
 @x1 = global i32 0, align 4
 @x2 = global i32 0, align 4





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