[llvm] r237537 - AVX-512: fixed extended load to 512-bit register

[Elena Demikhovsky]

Author: delena
Date: Sun May 17 03:08:06 2015
New Revision: 237537

URL: http://llvm.org/viewvc/llvm-project?rev=237537&view=rev
Log:
AVX-512: fixed extended load to 512-bit register


Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
    llvm/trunk/test/CodeGen/X86/avx512-trunc-ext.ll

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=237537&r1=237536&r2=237537&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Sun May 17 03:08:06 2015
@@ -14022,8 +14022,8 @@ static SDValue LowerExtendedLoad(SDValue
          "Can only lower sext loads with a single scalar load!");
 
   unsigned loadRegZize = RegSz;
-  if (Ext == ISD::SEXTLOAD && RegSz == 256)
-    loadRegZize /= 2;
+  if (Ext == ISD::SEXTLOAD && RegSz >= 256)
+    loadRegZize = 128;
 
   // Represent our vector as a sequence of elements which are the
   // largest scalar that we can load.

Modified: llvm/trunk/test/CodeGen/X86/avx512-trunc-ext.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512-trunc-ext.ll?rev=237537&r1=237536&r2=237537&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avx512-trunc-ext.ll (original)
+++ llvm/trunk/test/CodeGen/X86/avx512-trunc-ext.ll Sun May 17 03:08:06 2015
@@ -193,3 +193,13 @@ define <8 x i64> @sext_8i1_8i64(<8 x i32
   %y = sext <8 x i1> %x to <8 x i64>
   ret <8 x i64> %y
 }
+
+; CHECK-LABEL: @extload_v8i64
+; CHECK: vpmovsxbq
+define void @extload_v8i64(<8 x i8>* %a, <8 x i64>* %res) {
+  %sign_load = load <8 x i8>, <8 x i8>* %a
+  %c = sext <8 x i8> %sign_load to <8 x i64>
+  store <8 x i64> %c, <8 x i64>* %res
+  ret void
+}
+