[llvm] r237469 - MC: Update MCCodeEmitter naming. NFC.
Jim Grosbach
grosbach at apple.com
Fri May 15 12:13:16 PDT 2015
Author: grosbach
Date: Fri May 15 14:13:16 2015
New Revision: 237469
URL: http://llvm.org/viewvc/llvm-project?rev=237469&view=rev
Log:
MC: Update MCCodeEmitter naming. NFC.
s/EncodeInstruction/encodeInstruction/
Modified:
llvm/trunk/include/llvm/MC/MCCodeEmitter.h
llvm/trunk/lib/MC/MCAsmStreamer.cpp
llvm/trunk/lib/MC/MCAssembler.cpp
llvm/trunk/lib/MC/MCELFStreamer.cpp
llvm/trunk/lib/MC/MCMachOStreamer.cpp
llvm/trunk/lib/MC/MCObjectStreamer.cpp
llvm/trunk/lib/MC/WinCOFFStreamer.cpp
llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
llvm/trunk/lib/Target/BPF/MCTargetDesc/BPFMCCodeEmitter.cpp
llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp
llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.h
llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.h
llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
llvm/trunk/lib/Target/R600/AMDGPUMCInstLower.cpp
llvm/trunk/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
llvm/trunk/lib/Target/R600/MCTargetDesc/SIMCCodeEmitter.cpp
llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcMCCodeEmitter.cpp
llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCCodeEmitter.cpp
llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
llvm/trunk/lib/Target/X86/X86MCInstLower.cpp
Modified: llvm/trunk/include/llvm/MC/MCCodeEmitter.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/MC/MCCodeEmitter.h?rev=237469&r1=237468&r2=237469&view=diff
==============================================================================
--- llvm/trunk/include/llvm/MC/MCCodeEmitter.h (original)
+++ llvm/trunk/include/llvm/MC/MCCodeEmitter.h Fri May 15 14:13:16 2015
@@ -35,7 +35,7 @@ public:
/// EncodeInstruction - Encode the given \p Inst to bytes on the output
/// stream \p OS.
- virtual void EncodeInstruction(const MCInst &Inst, raw_ostream &OS,
+ virtual void encodeInstruction(const MCInst &Inst, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const = 0;
};
Modified: llvm/trunk/lib/MC/MCAsmStreamer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCAsmStreamer.cpp?rev=237469&r1=237468&r2=237469&view=diff
==============================================================================
--- llvm/trunk/lib/MC/MCAsmStreamer.cpp (original)
+++ llvm/trunk/lib/MC/MCAsmStreamer.cpp Fri May 15 14:13:16 2015
@@ -1167,7 +1167,7 @@ void MCAsmStreamer::AddEncodingComment(c
SmallString<256> Code;
SmallVector<MCFixup, 4> Fixups;
raw_svector_ostream VecOS(Code);
- Emitter->EncodeInstruction(Inst, VecOS, Fixups, STI);
+ Emitter->encodeInstruction(Inst, VecOS, Fixups, STI);
VecOS.flush();
// If we are showing fixups, create symbolic markers in the encoded
Modified: llvm/trunk/lib/MC/MCAssembler.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCAssembler.cpp?rev=237469&r1=237468&r2=237469&view=diff
==============================================================================
--- llvm/trunk/lib/MC/MCAssembler.cpp (original)
+++ llvm/trunk/lib/MC/MCAssembler.cpp Fri May 15 14:13:16 2015
@@ -1020,7 +1020,7 @@ bool MCAssembler::relaxInstruction(MCAsm
SmallVector<MCFixup, 4> Fixups;
SmallString<256> Code;
raw_svector_ostream VecOS(Code);
- getEmitter().EncodeInstruction(Relaxed, VecOS, Fixups, F.getSubtargetInfo());
+ getEmitter().encodeInstruction(Relaxed, VecOS, Fixups, F.getSubtargetInfo());
VecOS.flush();
// Update the fragment.
Modified: llvm/trunk/lib/MC/MCELFStreamer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCELFStreamer.cpp?rev=237469&r1=237468&r2=237469&view=diff
==============================================================================
--- llvm/trunk/lib/MC/MCELFStreamer.cpp (original)
+++ llvm/trunk/lib/MC/MCELFStreamer.cpp Fri May 15 14:13:16 2015
@@ -479,7 +479,7 @@ void MCELFStreamer::EmitInstToData(const
SmallVector<MCFixup, 4> Fixups;
SmallString<256> Code;
raw_svector_ostream VecOS(Code);
- Assembler.getEmitter().EncodeInstruction(Inst, VecOS, Fixups, STI);
+ Assembler.getEmitter().encodeInstruction(Inst, VecOS, Fixups, STI);
VecOS.flush();
for (unsigned i = 0, e = Fixups.size(); i != e; ++i)
Modified: llvm/trunk/lib/MC/MCMachOStreamer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCMachOStreamer.cpp?rev=237469&r1=237468&r2=237469&view=diff
==============================================================================
--- llvm/trunk/lib/MC/MCMachOStreamer.cpp (original)
+++ llvm/trunk/lib/MC/MCMachOStreamer.cpp Fri May 15 14:13:16 2015
@@ -445,7 +445,7 @@ void MCMachOStreamer::EmitInstToData(con
SmallVector<MCFixup, 4> Fixups;
SmallString<256> Code;
raw_svector_ostream VecOS(Code);
- getAssembler().getEmitter().EncodeInstruction(Inst, VecOS, Fixups, STI);
+ getAssembler().getEmitter().encodeInstruction(Inst, VecOS, Fixups, STI);
VecOS.flush();
// Add the fixups and data.
Modified: llvm/trunk/lib/MC/MCObjectStreamer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/MCObjectStreamer.cpp?rev=237469&r1=237468&r2=237469&view=diff
==============================================================================
--- llvm/trunk/lib/MC/MCObjectStreamer.cpp (original)
+++ llvm/trunk/lib/MC/MCObjectStreamer.cpp Fri May 15 14:13:16 2015
@@ -256,7 +256,7 @@ void MCObjectStreamer::EmitInstToFragmen
SmallString<128> Code;
raw_svector_ostream VecOS(Code);
- getAssembler().getEmitter().EncodeInstruction(Inst, VecOS, IF->getFixups(),
+ getAssembler().getEmitter().encodeInstruction(Inst, VecOS, IF->getFixups(),
STI);
VecOS.flush();
IF->getContents().append(Code.begin(), Code.end());
Modified: llvm/trunk/lib/MC/WinCOFFStreamer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/MC/WinCOFFStreamer.cpp?rev=237469&r1=237468&r2=237469&view=diff
==============================================================================
--- llvm/trunk/lib/MC/WinCOFFStreamer.cpp (original)
+++ llvm/trunk/lib/MC/WinCOFFStreamer.cpp Fri May 15 14:13:16 2015
@@ -49,7 +49,7 @@ void MCWinCOFFStreamer::EmitInstToData(c
SmallVector<MCFixup, 4> Fixups;
SmallString<256> Code;
raw_svector_ostream VecOS(Code);
- getAssembler().getEmitter().EncodeInstruction(Inst, VecOS, Fixups, STI);
+ getAssembler().getEmitter().encodeInstruction(Inst, VecOS, Fixups, STI);
VecOS.flush();
// Add the fixups and data.
Modified: llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp?rev=237469&r1=237468&r2=237469&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp Fri May 15 14:13:16 2015
@@ -184,7 +184,7 @@ public:
}
}
- void EncodeInstruction(const MCInst &MI, raw_ostream &OS,
+ void encodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const override;
@@ -598,7 +598,7 @@ unsigned AArch64MCCodeEmitter::fixMOVZ(c
return EncodedValue & ~(1u << 30);
}
-void AArch64MCCodeEmitter::EncodeInstruction(const MCInst &MI, raw_ostream &OS,
+void AArch64MCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const {
if (MI.getOpcode() == AArch64::TLSDESCCALL) {
Modified: llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp?rev=237469&r1=237468&r2=237469&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp Fri May 15 14:13:16 2015
@@ -432,7 +432,7 @@ public:
}
}
- void EncodeInstruction(const MCInst &MI, raw_ostream &OS,
+ void encodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const override;
};
@@ -1666,7 +1666,7 @@ getShiftRight64Imm(const MCInst &MI, uns
}
void ARMMCCodeEmitter::
-EncodeInstruction(const MCInst &MI, raw_ostream &OS,
+encodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const {
// Pseudo instructions don't get encoded.
Modified: llvm/trunk/lib/Target/BPF/MCTargetDesc/BPFMCCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/BPF/MCTargetDesc/BPFMCCodeEmitter.cpp?rev=237469&r1=237468&r2=237469&view=diff
==============================================================================
--- llvm/trunk/lib/Target/BPF/MCTargetDesc/BPFMCCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/BPF/MCTargetDesc/BPFMCCodeEmitter.cpp Fri May 15 14:13:16 2015
@@ -52,7 +52,7 @@ public:
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const;
- void EncodeInstruction(const MCInst &MI, raw_ostream &OS,
+ void encodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const override;
};
@@ -117,7 +117,7 @@ void EmitBEConstant(uint64_t Val, unsign
EmitByte((Val >> i) & 255, CurByte, OS);
}
-void BPFMCCodeEmitter::EncodeInstruction(const MCInst &MI, raw_ostream &OS,
+void BPFMCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const {
unsigned Opcode = MI.getOpcode();
Modified: llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp?rev=237469&r1=237468&r2=237469&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp Fri May 15 14:13:16 2015
@@ -55,7 +55,7 @@ HexagonMCCodeEmitter::HexagonMCCodeEmitt
: MCT(aMCT), MCII(aMII), Addend(new unsigned(0)),
Extended(new bool(false)) {}
-void HexagonMCCodeEmitter::EncodeInstruction(MCInst const &MI, raw_ostream &OS,
+void HexagonMCCodeEmitter::encodeInstruction(MCInst const &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups,
MCSubtargetInfo const &STI) const {
uint64_t Binary = getBinaryCodeForInstr(MI, Fixups, STI) | getPacketBits(MI);
Modified: llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.h?rev=237469&r1=237468&r2=237469&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.h (original)
+++ llvm/trunk/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.h Fri May 15 14:13:16 2015
@@ -41,7 +41,7 @@ public:
MCSubtargetInfo const &getSubtargetInfo() const;
- void EncodeInstruction(MCInst const &MI, raw_ostream &OS,
+ void encodeInstruction(MCInst const &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups,
MCSubtargetInfo const &STI) const override;
Modified: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp?rev=237469&r1=237468&r2=237469&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp Fri May 15 14:13:16 2015
@@ -141,10 +141,10 @@ void MipsMCCodeEmitter::EmitInstruction(
}
}
-/// EncodeInstruction - Emit the instruction.
+/// encodeInstruction - Emit the instruction.
/// Size the instruction with Desc.getSize().
void MipsMCCodeEmitter::
-EncodeInstruction(const MCInst &MI, raw_ostream &OS,
+encodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const
{
@@ -177,7 +177,7 @@ EncodeInstruction(const MCInst &MI, raw_
unsigned Opcode = TmpInst.getOpcode();
if ((Opcode != Mips::NOP) && (Opcode != Mips::SLL) &&
(Opcode != Mips::SLL_MM) && !Binary)
- llvm_unreachable("unimplemented opcode in EncodeInstruction()");
+ llvm_unreachable("unimplemented opcode in encodeInstruction()");
int NewOpcode = -1;
if (isMicroMips(STI)) {
Modified: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.h?rev=237469&r1=237468&r2=237469&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.h (original)
+++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.h Fri May 15 14:13:16 2015
@@ -51,7 +51,7 @@ public:
void EmitInstruction(uint64_t Val, unsigned Size, const MCSubtargetInfo &STI,
raw_ostream &OS) const;
- void EncodeInstruction(const MCInst &MI, raw_ostream &OS,
+ void encodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const override;
Modified: llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp?rev=237469&r1=237468&r2=237469&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp Fri May 15 14:13:16 2015
@@ -97,7 +97,7 @@ public:
uint64_t getBinaryCodeForInstr(const MCInst &MI,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const;
- void EncodeInstruction(const MCInst &MI, raw_ostream &OS,
+ void encodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const override {
// For fast-isel, a float COPY_TO_REGCLASS can survive this long.
Modified: llvm/trunk/lib/Target/R600/AMDGPUMCInstLower.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/AMDGPUMCInstLower.cpp?rev=237469&r1=237468&r2=237469&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/AMDGPUMCInstLower.cpp (original)
+++ llvm/trunk/lib/Target/R600/AMDGPUMCInstLower.cpp Fri May 15 14:13:16 2015
@@ -134,7 +134,7 @@ void AMDGPUAsmPrinter::EmitInstruction(c
auto &ObjStreamer = static_cast<MCObjectStreamer&>(*OutStreamer);
MCCodeEmitter &InstEmitter = ObjStreamer.getAssembler().getEmitter();
- InstEmitter.EncodeInstruction(TmpInst, CodeStream, Fixups,
+ InstEmitter.encodeInstruction(TmpInst, CodeStream, Fixups,
MF->getSubtarget<MCSubtargetInfo>());
CodeStream.flush();
Modified: llvm/trunk/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp?rev=237469&r1=237468&r2=237469&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp Fri May 15 14:13:16 2015
@@ -41,7 +41,7 @@ public:
: MCII(mcii), MRI(mri) { }
/// \brief Encode the instruction and write it to the OS.
- void EncodeInstruction(const MCInst &MI, raw_ostream &OS,
+ void encodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const override;
@@ -86,7 +86,7 @@ MCCodeEmitter *llvm::createR600MCCodeEmi
return new R600MCCodeEmitter(MCII, MRI);
}
-void R600MCCodeEmitter::EncodeInstruction(const MCInst &MI, raw_ostream &OS,
+void R600MCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const {
const MCInstrDesc &Desc = MCII.get(MI.getOpcode());
Modified: llvm/trunk/lib/Target/R600/MCTargetDesc/SIMCCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/MCTargetDesc/SIMCCodeEmitter.cpp?rev=237469&r1=237468&r2=237469&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/MCTargetDesc/SIMCCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/R600/MCTargetDesc/SIMCCodeEmitter.cpp Fri May 15 14:13:16 2015
@@ -52,7 +52,7 @@ public:
~SIMCCodeEmitter() override {}
/// \brief Encode the instruction and write it to the OS.
- void EncodeInstruction(const MCInst &MI, raw_ostream &OS,
+ void encodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const override;
@@ -179,7 +179,7 @@ uint32_t SIMCCodeEmitter::getLitEncoding
return getLit64Encoding(static_cast<uint64_t>(MO.getImm()));
}
-void SIMCCodeEmitter::EncodeInstruction(const MCInst &MI, raw_ostream &OS,
+void SIMCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const {
Modified: llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcMCCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcMCCodeEmitter.cpp?rev=237469&r1=237468&r2=237469&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcMCCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/MCTargetDesc/SparcMCCodeEmitter.cpp Fri May 15 14:13:16 2015
@@ -41,7 +41,7 @@ public:
~SparcMCCodeEmitter() override {}
- void EncodeInstruction(const MCInst &MI, raw_ostream &OS,
+ void encodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const override;
@@ -79,7 +79,7 @@ MCCodeEmitter *llvm::createSparcMCCodeEm
return new SparcMCCodeEmitter(Ctx);
}
-void SparcMCCodeEmitter::EncodeInstruction(const MCInst &MI, raw_ostream &OS,
+void SparcMCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const {
unsigned Bits = getBinaryCodeForInstr(MI, Fixups, STI);
@@ -154,7 +154,7 @@ getCallTargetOpValue(const MCInst &MI, u
if (MI.getOpcode() == SP::TLS_CALL) {
// No fixups for __tls_get_addr. Will emit for fixups for tls_symbol in
- // EncodeInstruction.
+ // encodeInstruction.
#ifndef NDEBUG
// Verify that the callee is actually __tls_get_addr.
const SparcMCExpr *SExpr = dyn_cast<SparcMCExpr>(MO.getExpr());
Modified: llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCCodeEmitter.cpp?rev=237469&r1=237468&r2=237469&view=diff
==============================================================================
--- llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/SystemZ/MCTargetDesc/SystemZMCCodeEmitter.cpp Fri May 15 14:13:16 2015
@@ -35,7 +35,7 @@ public:
~SystemZMCCodeEmitter() override {}
// OVerride MCCodeEmitter.
- void EncodeInstruction(const MCInst &MI, raw_ostream &OS,
+ void encodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const override;
@@ -118,7 +118,7 @@ MCCodeEmitter *llvm::createSystemZMCCode
}
void SystemZMCCodeEmitter::
-EncodeInstruction(const MCInst &MI, raw_ostream &OS,
+encodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const {
uint64_t Bits = getBinaryCodeForInstr(MI, Fixups, STI);
Modified: llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp?rev=237469&r1=237468&r2=237469&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp (original)
+++ llvm/trunk/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp Fri May 15 14:13:16 2015
@@ -149,7 +149,7 @@ public:
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const;
- void EncodeInstruction(const MCInst &MI, raw_ostream &OS,
+ void encodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const override;
@@ -1152,7 +1152,7 @@ void X86MCCodeEmitter::EmitOpcodePrefix(
}
void X86MCCodeEmitter::
-EncodeInstruction(const MCInst &MI, raw_ostream &OS,
+encodeInstruction(const MCInst &MI, raw_ostream &OS,
SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const {
unsigned Opcode = MI.getOpcode();
Modified: llvm/trunk/lib/Target/X86/X86MCInstLower.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86MCInstLower.cpp?rev=237469&r1=237468&r2=237469&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86MCInstLower.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86MCInstLower.cpp Fri May 15 14:13:16 2015
@@ -87,7 +87,7 @@ namespace llvm {
SmallString<256> Code;
SmallVector<MCFixup, 4> Fixups;
raw_svector_ostream VecOS(Code);
- CodeEmitter->EncodeInstruction(Inst, VecOS, Fixups, STI);
+ CodeEmitter->encodeInstruction(Inst, VecOS, Fixups, STI);
VecOS.flush();
CurrentShadowSize += Code.size();
if (CurrentShadowSize >= RequiredShadowSize)
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