[PATCH] [SDAG] Add SDNodes for umin, umax, smin and smax

[James Molloy]

Hi Elena,
> Why NumValues should be 1? You can do the same for each value and then
merge them together.

This isn't trivial though; we can't use a MERGE_VALUES node surely:
consider:

  %1 = icmp slt, i128 %a, i128 %b
  %2 = select i1 %1, i128 %a, i128 %b

Assuming the i128 gets split into separate registers, we can't just do this:

  %1 = i64 = SMIN i64 %a:0, i64 %b:0
  %2 = i64 = SMIN i64 %a:1, i64 %b:1
  %3 = i128 = MERGE_VALUES %1, %2

Because the separate halves of the i128 are not safe to be operated on in
isolation - each value needs to be interpreted as a i128. You can see that
in "visitICmp()", multiple values aren't handled either.

On Thu, 14 May 2015 at 12:07 Elena Demikhovsky <elena.demikhovsky at intel.com>
wrote:

> REPOSITORY
>   rL LLVM
>
> ================
> Comment at: lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp:2258
> @@ -2257,1 +2257,3 @@
>
> +  if (NumValues == 1) {
> +    Value *LHS, *RHS;
> ----------------
> Why NumValues should be 1? You can do the same for each value and then
> merge them together.
>
>
> ================
> Comment at: lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp:2275
> @@ +2274,3 @@
> +
> +    if (Opc != ISD::DELETED_NODE &&
> +        DAG.getTargetLoweringInfo().isOperationLegalOrCustom(Opc, VT)) {
> ----------------
> you can put the "while" (5 lines above) under this "if"
>
> http://reviews.llvm.org/D9746
>
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