[llvm] r237132 - R600/SI: Replace TRI->getRegClass(Reg) with TRI->getPhysRegClass(Reg)
Tom Stellard
thomas.stellard at amd.com
Tue May 12 07:18:11 PDT 2015
Author: tstellar
Date: Tue May 12 09:18:11 2015
New Revision: 237132
URL: http://llvm.org/viewvc/llvm-project?rev=237132&view=rev
Log:
R600/SI: Replace TRI->getRegClass(Reg) with TRI->getPhysRegClass(Reg)
TRI->getRegClass() takes a register class ID, not a register. We were
using this incorrectly in a few places.
Modified:
llvm/trunk/lib/Target/R600/SIFixSGPRCopies.cpp
llvm/trunk/lib/Target/R600/SIFoldOperands.cpp
llvm/trunk/lib/Target/R600/SIRegisterInfo.cpp
Modified: llvm/trunk/lib/Target/R600/SIFixSGPRCopies.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/SIFixSGPRCopies.cpp?rev=237132&r1=237131&r2=237132&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/SIFixSGPRCopies.cpp (original)
+++ llvm/trunk/lib/Target/R600/SIFixSGPRCopies.cpp Tue May 12 09:18:11 2015
@@ -140,7 +140,7 @@ const TargetRegisterClass *SIFixSGPRCopi
const TargetRegisterClass *RC
= TargetRegisterInfo::isVirtualRegister(Reg) ?
MRI.getRegClass(Reg) :
- TRI->getRegClass(Reg);
+ TRI->getPhysRegClass(Reg);
RC = TRI->getSubRegClass(RC, SubReg);
for (MachineRegisterInfo::use_instr_iterator
@@ -183,10 +183,13 @@ bool SIFixSGPRCopies::isVGPRToSGPRCopy(c
unsigned SrcReg = Copy.getOperand(1).getReg();
unsigned SrcSubReg = Copy.getOperand(1).getSubReg();
- const TargetRegisterClass *DstRC
- = TargetRegisterInfo::isVirtualRegister(DstReg) ?
- MRI.getRegClass(DstReg) :
- TRI->getRegClass(DstReg);
+ if (!TargetRegisterInfo::isVirtualRegister(DstReg)) {
+ // If the destination register is a physical register there isn't really
+ // much we can do to fix this.
+ return false;
+ }
+
+ const TargetRegisterClass *DstRC = MRI.getRegClass(DstReg);
const TargetRegisterClass *SrcRC;
Modified: llvm/trunk/lib/Target/R600/SIFoldOperands.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/SIFoldOperands.cpp?rev=237132&r1=237131&r2=237132&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/SIFoldOperands.cpp (original)
+++ llvm/trunk/lib/Target/R600/SIFoldOperands.cpp Tue May 12 09:18:11 2015
@@ -216,7 +216,7 @@ bool SIFoldOperands::runOnMachineFunctio
const TargetRegisterClass *UseRC
= TargetRegisterInfo::isVirtualRegister(UseReg) ?
MRI.getRegClass(UseReg) :
- TRI.getRegClass(UseReg);
+ TRI.getPhysRegClass(UseReg);
Imm = APInt(64, OpToFold.getImm());
@@ -240,7 +240,7 @@ bool SIFoldOperands::runOnMachineFunctio
const TargetRegisterClass *DestRC
= TargetRegisterInfo::isVirtualRegister(DestReg) ?
MRI.getRegClass(DestReg) :
- TRI.getRegClass(DestReg);
+ TRI.getPhysRegClass(DestReg);
unsigned MovOp = TII->getMovOpcode(DestRC);
if (MovOp == AMDGPU::COPY)
Modified: llvm/trunk/lib/Target/R600/SIRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/R600/SIRegisterInfo.cpp?rev=237132&r1=237131&r2=237132&view=diff
==============================================================================
--- llvm/trunk/lib/Target/R600/SIRegisterInfo.cpp (original)
+++ llvm/trunk/lib/Target/R600/SIRegisterInfo.cpp Tue May 12 09:18:11 2015
@@ -347,6 +347,7 @@ const TargetRegisterClass *SIRegisterInf
assert(!TargetRegisterInfo::isVirtualRegister(Reg));
static const TargetRegisterClass *BaseClasses[] = {
+ &AMDGPU::M0RegRegClass,
&AMDGPU::VGPR_32RegClass,
&AMDGPU::SReg_32RegClass,
&AMDGPU::VReg_64RegClass,
More information about the llvm-commits
mailing list