[PATCH] [Target/X86] Fix crash in assignTopologicalOrder()

[Davide Italiano]

Hi bkramer,

Disclaimer: I'm not really familiar with the lowering code, and it looks pretty scary. If this doesn't make sense, I apologize in advance.

It seems that call to ReplaceAllUsesWith() when we're turning SHL -> AND is not really required and causes problems with the testcase below. It ends up producing an incorrect DAG, with a cycle in, so a topological order can't be assigned.

In particular this issue shows up if getConstant() gets an existing node in the graph rather than generating a new one, which is then incorrectly deleted causing the issue.

As an added note, In the test, {2, 127} can be changed to {4, 63} or {8, 31} and the issue remain.
  %mul = mul i8 %trunc, 2
  %and = and i8 %trunc, 127

REPOSITORY
  rL LLVM

http://reviews.llvm.org/D9642

Files:
  lib/Target/X86/X86ISelLowering.cpp
  test/CodeGen/X86/icmp-lowering-crash.ll

Index: lib/Target/X86/X86ISelLowering.cpp
===================================================================
--- lib/Target/X86/X86ISelLowering.cpp
+++ lib/Target/X86/X86ISelLowering.cpp
@@ -12677,7 +12677,6 @@
         break;
       SDValue New = DAG.getNode(ISD::AND, dl, VT, Op->getOperand(0),
                                 DAG.getConstant(Mask, dl, VT));
-      DAG.ReplaceAllUsesWith(Op, New);
       Op = New;
     }
     break;
Index: test/CodeGen/X86/icmp-lowering-crash.ll
===================================================================
--- test/CodeGen/X86/icmp-lowering-crash.ll
+++ test/CodeGen/X86/icmp-lowering-crash.ll
@@ -0,0 +1,19 @@
+; RUN: llc < %s > /dev/null
+target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+target triple = "x86_64-unknown-linux-gnu"
+ 
+ at a = external global i32, align 4
+ at b = external global i1, align 4
+ 
+define i1 @f() {
+entry:
+  %load = load i32, i32* @a, align 4
+  %trunc = trunc i32 %load to i8
+  %mul = mul i8 %trunc, 2
+  %icmp1 = icmp ne i8 %mul, 0
+  store i1 %icmp1, i1* @b, align 4
+  %and = and i8 %trunc, 127
+  %icmp2 = icmp ne i8 %and, 0
+  ret i1 %icmp2
+}
+

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