[PATCH] Fix MergeConsecutiveStore for non-byte-sized memory accesses.

[James Y Knight]

This bug showed up as a compiler bug building msan tests on x86-64.

Prior to r236850, this bug was masked due to a bogus alignment check,
which also accidentally rejected non-byte-sized accesses.

It would probably be a good idea to handle merging stores of this kind
as well, but for now, to un-break it, make the minimal fix.

http://reviews.llvm.org/D9626

Files:
  lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  test/CodeGen/X86/merge-consecutive-stores-i1.ll

Index: lib/CodeGen/SelectionDAG/DAGCombiner.cpp
===================================================================
--- lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -10673,6 +10673,10 @@
   bool NoVectors = DAG.getMachineFunction().getFunction()->hasFnAttribute(
       Attribute::NoImplicitFloat);
 
+  // This function cannot currently deal with non-byte-sized memory sizes.
+  if (ElementSizeBytes * 8 != MemVT.getSizeInBits())
+    return false;
+
   // Don't merge vectors into wider inputs.
   if (MemVT.isVector() || !MemVT.isSimple())
     return false;
Index: test/CodeGen/X86/merge-consecutive-stores-i1.ll
===================================================================
--- /dev/null
+++ test/CodeGen/X86/merge-consecutive-stores-i1.ll
@@ -0,0 +1,15 @@
+; RUN: llc  -march=x86-64 < %s
+
+; Ensure that MergeConsecutiveStores doesn't crash when dealing with
+; i1 operands.
+
+%struct.X = type { i1, i1 }
+
+ at b = common global %struct.X zeroinitializer, align 4
+
+define void @foo() {
+entry:
+  store i1 0, i1* getelementptr inbounds (%struct.X, %struct.X* @b, i64 0, i32 0), align 4
+  store i1 0, i1* getelementptr inbounds (%struct.X, %struct.X* @b, i64 0, i32 1), align 4
+  ret void
+}

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