[PATCH] [X86] Add HasAVX512 patterns for SS SSE intrinsics.

Ahmed Bougacha ahmed.bougacha at gmail.com
Thu May 7 15:57:44 PDT 2015


In http://reviews.llvm.org/D9362#168427, @qcolombet wrote:

> >   I don't think that we should add all SSE intrinsics to AVX512 now.
>
>
> I kind of disagree.
>  When AVX512 is available we have additional registers we can use for those. I believe we should do the same thing as we do for thumb, i.e., choose the most permissive instruction encoding then shorten the encoding if possible (like the Thumb2SizeReduction pass).


I agree, this seems like the way to go;  see http://llvm.org/bugs/show_bug.cgi?id=23376.

> For the long term we may want to find a better solution for such case (same instruction available with different encoding based on extension) to avoid the explosion in size of the description.


I also agree.  In fact I think there are two orthogonal issues here:

- like I proposed earlier, we should use IntrinsicsInfo for scalar intrinsics.  I filed https://llvm.org/bugs/show_bug.cgi?id=23449
- in lots of cases, the main difference between SSE/AVX/AVX512 instructions is the encoding.  Due to the way the backend evolved, they're mostly apart, with lots of duplications (now it's even worse because AVX512 is in a completely different file).  There's room for refactoring, I think, but that's a big change.

I can repurpose this review to implement the first one, if people agree?  Also, if the second makes sense, I'll file a PR as well.

-Ahmed

> What do you think?

> 

> Cheers,

> -Quentin



http://reviews.llvm.org/D9362

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