[PATCH] R600/SI: Fix bug in VGPR spilling

[Tom Stellard]

Hi arsenm,

AMDGPU::SI_SPILL_V96_RESTORE was missing from a switch statement, which caused the srsrc and soffset register to not be set correctly.

This commit replaces the switch statement with a SITargetInfo query to make sure all spill instructions are covered.

REPOSITORY
  rL LLVM

http://reviews.llvm.org/D9582

Files:
  lib/Target/R600/SIDefines.h
  lib/Target/R600/SIInstrFormats.td
  lib/Target/R600/SIInstrInfo.h
  lib/Target/R600/SIInstructions.td
  lib/Target/R600/SIPrepareScratchRegs.cpp

EMAIL PREFERENCES
  http://reviews.llvm.org/settings/panel/emailpreferences/
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D9582.25252.patch
Type: text/x-patch
Size: 8811 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20150507/55b1399a/attachment.bin>